Clean up trailing whitespace in the kernel headers.
And fix the scripts so they stop letting trailing whitespace through. Change-Id: Ie109fbe1f63321e565ba0fa60fee8e9cf3a61cfc
This commit is contained in:
@@ -132,7 +132,7 @@ struct au1xxx_irqmap {
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#define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define AU1000_MAX_INTR AU1000_INTC1_INT_LAST
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#define INTX 0xFF
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#define INTX 0xFF
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#define SYS_BASE 0xB1900000
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#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -403,86 +403,86 @@ struct au1xxx_irqmap {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_BASE UART0_ADDR
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#define UART_DEBUG_BASE UART3_ADDR
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#define UART_RX 0
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#define UART_TX 4
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#define UART_RX 0
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#define UART_TX 4
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_IER 8
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#define UART_IIR 0xC
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#define UART_FCR 0x10
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#define UART_LCR 0x14
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#define UART_IER 8
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#define UART_IIR 0xC
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#define UART_FCR 0x10
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#define UART_LCR 0x14
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MCR 0x18
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#define UART_LSR 0x1C
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#define UART_MSR 0x20
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#define UART_CLK 0x28
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#define UART_MCR 0x18
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#define UART_LSR 0x1C
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#define UART_MSR 0x20
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#define UART_CLK 0x28
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MOD_CNTRL 0x100
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#define UART_FCR_ENABLE_FIFO 0x01
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#define UART_FCR_CLEAR_RCVR 0x02
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#define UART_FCR_CLEAR_XMIT 0x04
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#define UART_MOD_CNTRL 0x100
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#define UART_FCR_ENABLE_FIFO 0x01
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#define UART_FCR_CLEAR_RCVR 0x02
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#define UART_FCR_CLEAR_XMIT 0x04
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_FCR_DMA_SELECT 0x08
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#define UART_FCR_TRIGGER_MASK 0xF0
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#define UART_FCR_R_TRIGGER_1 0x00
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#define UART_FCR_R_TRIGGER_4 0x40
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#define UART_FCR_DMA_SELECT 0x08
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#define UART_FCR_TRIGGER_MASK 0xF0
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#define UART_FCR_R_TRIGGER_1 0x00
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#define UART_FCR_R_TRIGGER_4 0x40
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_FCR_R_TRIGGER_8 0x80
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#define UART_FCR_R_TRIGGER_14 0xA0
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#define UART_FCR_T_TRIGGER_0 0x00
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#define UART_FCR_T_TRIGGER_4 0x10
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#define UART_FCR_R_TRIGGER_8 0x80
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#define UART_FCR_R_TRIGGER_14 0xA0
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#define UART_FCR_T_TRIGGER_0 0x00
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#define UART_FCR_T_TRIGGER_4 0x10
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_FCR_T_TRIGGER_8 0x20
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#define UART_FCR_T_TRIGGER_12 0x30
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#define UART_LCR_SBC 0x40
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#define UART_LCR_SPAR 0x20
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#define UART_FCR_T_TRIGGER_8 0x20
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#define UART_FCR_T_TRIGGER_12 0x30
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#define UART_LCR_SBC 0x40
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#define UART_LCR_SPAR 0x20
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_LCR_EPAR 0x10
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#define UART_LCR_PARITY 0x08
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#define UART_LCR_STOP 0x04
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#define UART_LCR_WLEN5 0x00
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#define UART_LCR_EPAR 0x10
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#define UART_LCR_PARITY 0x08
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#define UART_LCR_STOP 0x04
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#define UART_LCR_WLEN5 0x00
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_LCR_WLEN6 0x01
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#define UART_LCR_WLEN7 0x02
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#define UART_LCR_WLEN8 0x03
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#define UART_LSR_TEMT 0x40
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#define UART_LCR_WLEN6 0x01
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#define UART_LCR_WLEN7 0x02
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#define UART_LCR_WLEN8 0x03
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#define UART_LSR_TEMT 0x40
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_LSR_THRE 0x20
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#define UART_LSR_BI 0x10
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#define UART_LSR_FE 0x08
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#define UART_LSR_PE 0x04
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#define UART_LSR_THRE 0x20
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#define UART_LSR_BI 0x10
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#define UART_LSR_FE 0x08
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#define UART_LSR_PE 0x04
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_LSR_OE 0x02
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#define UART_LSR_DR 0x01
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#define UART_IIR_NO_INT 0x01
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#define UART_IIR_ID 0x06
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#define UART_LSR_OE 0x02
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#define UART_LSR_DR 0x01
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#define UART_IIR_NO_INT 0x01
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#define UART_IIR_ID 0x06
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_IIR_MSI 0x00
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#define UART_IIR_THRI 0x02
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#define UART_IIR_RDI 0x04
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#define UART_IIR_RLSI 0x06
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#define UART_IIR_MSI 0x00
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#define UART_IIR_THRI 0x02
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#define UART_IIR_RDI 0x04
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#define UART_IIR_RLSI 0x06
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_IER_MSI 0x08
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#define UART_IER_RLSI 0x04
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#define UART_IER_THRI 0x02
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#define UART_IER_RDI 0x01
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#define UART_IER_MSI 0x08
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#define UART_IER_RLSI 0x04
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#define UART_IER_THRI 0x02
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#define UART_IER_RDI 0x01
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MCR_LOOP 0x10
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#define UART_MCR_OUT2 0x08
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#define UART_MCR_OUT1 0x04
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#define UART_MCR_RTS 0x02
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#define UART_MCR_LOOP 0x10
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#define UART_MCR_OUT2 0x08
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#define UART_MCR_OUT1 0x04
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#define UART_MCR_RTS 0x02
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MCR_DTR 0x01
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#define UART_MSR_DCD 0x80
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#define UART_MSR_RI 0x40
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#define UART_MSR_DSR 0x20
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#define UART_MCR_DTR 0x01
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#define UART_MSR_DCD 0x80
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#define UART_MSR_RI 0x40
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#define UART_MSR_DSR 0x20
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MSR_CTS 0x10
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#define UART_MSR_DDCD 0x08
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#define UART_MSR_TERI 0x04
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#define UART_MSR_DDSR 0x02
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#define UART_MSR_CTS 0x10
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#define UART_MSR_DDCD 0x08
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#define UART_MSR_TERI 0x04
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#define UART_MSR_DDSR 0x02
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define UART_MSR_DCTS 0x01
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#define UART_MSR_ANY_DELTA 0x0F
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#define UART_MSR_DCTS 0x01
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#define UART_MSR_ANY_DELTA 0x0F
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#define SSI0_STATUS 0xB1600000
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#define SSI_STATUS_BF (1 << 4)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -628,31 +628,31 @@ struct au1xxx_irqmap {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40)
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#define SYS_PINFUNC 0xB190002C
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#define SYS_PF_USB (1 << 15)
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#define SYS_PF_U3 (1 << 14)
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#define SYS_PF_USB (1 << 15)
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#define SYS_PF_U3 (1 << 14)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYS_PF_U2 (1 << 13)
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#define SYS_PF_U1 (1 << 12)
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#define SYS_PF_SRC (1 << 11)
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#define SYS_PF_CK5 (1 << 10)
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#define SYS_PF_U2 (1 << 13)
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#define SYS_PF_U1 (1 << 12)
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#define SYS_PF_SRC (1 << 11)
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#define SYS_PF_CK5 (1 << 10)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYS_PF_CK4 (1 << 9)
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#define SYS_PF_IRF (1 << 8)
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#define SYS_PF_UR3 (1 << 7)
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#define SYS_PF_I2D (1 << 6)
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#define SYS_PF_CK4 (1 << 9)
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#define SYS_PF_IRF (1 << 8)
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#define SYS_PF_UR3 (1 << 7)
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#define SYS_PF_I2D (1 << 6)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYS_PF_I2S (1 << 5)
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#define SYS_PF_NI2 (1 << 4)
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#define SYS_PF_U0 (1 << 3)
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#define SYS_PF_RD (1 << 2)
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#define SYS_PF_I2S (1 << 5)
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#define SYS_PF_NI2 (1 << 4)
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#define SYS_PF_U0 (1 << 3)
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#define SYS_PF_RD (1 << 2)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYS_PF_A97 (1 << 1)
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#define SYS_PF_S0 (1 << 0)
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#define SYS_PF_PC (1 << 18)
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#define SYS_PF_LCD (1 << 17)
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#define SYS_PF_A97 (1 << 1)
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#define SYS_PF_S0 (1 << 0)
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#define SYS_PF_PC (1 << 18)
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#define SYS_PF_LCD (1 << 17)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYS_PF_CS (1 << 16)
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#define SYS_PF_EX0 (1 << 9)
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#define SYS_PF_CS (1 << 16)
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#define SYS_PF_EX0 (1 << 9)
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#define SYS_PF_PSC2_MASK (7 << 17)
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#define SYS_PF_PSC2_AC97 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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