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am 3ad36e52: bionic: update sanitized MSM, V4L2 kernel headers

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* commit '3ad36e525f1e0c5c35c9e854e542acff48e515a8':
  bionic: update sanitized MSM, V4L2 kernel headers
This commit is contained in:
Iliyan Malchev 2012-08-27 15:13:48 -07:00 committed by Android Git Automerger
commit c9008991f3
6 changed files with 948 additions and 703 deletions
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175
libc/kernel/common/linux/msm_mdp.h
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@ -63,439 +63,440 @@
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp) #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int) #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
#define FB_TYPE_3D_PANEL 0x10101010 #define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_IMGTYPE2_START 0x10000
#define MSMFB_DRIVER_VERSION 0xF9E8D701 #define MSMFB_DRIVER_VERSION 0xF9E8D701
enum { enum {
NOTIFY_UPDATE_START, NOTIFY_UPDATE_START,
NOTIFY_UPDATE_STOP,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
NOTIFY_UPDATE_STOP,
}; };
enum { enum {
MDP_RGB_565, MDP_RGB_565,
MDP_XRGB_8888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_XRGB_8888,
MDP_Y_CBCR_H2V2, MDP_Y_CBCR_H2V2,
MDP_Y_CBCR_H2V2_ADRENO, MDP_Y_CBCR_H2V2_ADRENO,
MDP_ARGB_8888, MDP_ARGB_8888,
MDP_RGB_888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_RGB_888,
MDP_Y_CRCB_H2V2, MDP_Y_CRCB_H2V2,
MDP_YCRYCB_H2V1, MDP_YCRYCB_H2V1,
MDP_Y_CRCB_H2V1, MDP_Y_CRCB_H2V1,
MDP_Y_CBCR_H2V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CBCR_H2V1,
MDP_Y_CRCB_H1V2, MDP_Y_CRCB_H1V2,
MDP_Y_CBCR_H1V2, MDP_Y_CBCR_H1V2,
MDP_RGBA_8888, MDP_RGBA_8888,
MDP_BGRA_8888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_BGRA_8888,
MDP_RGBX_8888, MDP_RGBX_8888,
MDP_Y_CRCB_H2V2_TILE, MDP_Y_CRCB_H2V2_TILE,
MDP_Y_CBCR_H2V2_TILE, MDP_Y_CBCR_H2V2_TILE,
MDP_Y_CR_CB_H2V2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CR_CB_H2V2,
MDP_Y_CR_CB_GH2V2, MDP_Y_CR_CB_GH2V2,
MDP_Y_CB_CR_H2V2, MDP_Y_CB_CR_H2V2,
MDP_Y_CRCB_H1V1, MDP_Y_CRCB_H1V1,
MDP_Y_CBCR_H1V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CBCR_H1V1,
MDP_YCRCB_H1V1, MDP_YCRCB_H1V1,
MDP_YCBCR_H1V1, MDP_YCBCR_H1V1,
MDP_BGR_565, MDP_BGR_565,
MDP_IMGTYPE_LIMIT,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_IMGTYPE_LIMIT,
MDP_RGB_BORDERFILL, MDP_RGB_BORDERFILL,
MDP_FB_FORMAT = MDP_IMGTYPE2_START, MDP_FB_FORMAT = MDP_IMGTYPE2_START,
MDP_IMGTYPE_LIMIT2 MDP_IMGTYPE_LIMIT2
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
enum { enum {
PMEM_IMG, PMEM_IMG,
FB_IMG, FB_IMG,
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
enum { enum {
HSIC_HUE = 0, HSIC_HUE = 0,
HSIC_SAT, HSIC_SAT,
HSIC_INT,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
HSIC_INT,
HSIC_CON, HSIC_CON,
NUM_HSIC_PARAM, NUM_HSIC_PARAM,
}; };
#define MDSS_MDP_ROT_ONLY 0x80
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDSS_MDP_ROT_ONLY 0x80
#define MDSS_MDP_RIGHT_MIXER 0x100 #define MDSS_MDP_RIGHT_MIXER 0x100
#define MDP_ROT_NOP 0 #define MDP_ROT_NOP 0
#define MDP_FLIP_LR 0x1 #define MDP_FLIP_LR 0x1
#define MDP_FLIP_UD 0x2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FLIP_UD 0x2
#define MDP_ROT_90 0x4 #define MDP_ROT_90 0x4
#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
#define MDP_DITHER 0x8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_DITHER 0x8
#define MDP_BLUR 0x10 #define MDP_BLUR 0x10
#define MDP_BLEND_FG_PREMULT 0x20000 #define MDP_BLEND_FG_PREMULT 0x20000
#define MDP_DEINTERLACE 0x80000000 #define MDP_DEINTERLACE 0x80000000
#define MDP_SHARPENING 0x40000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_SHARPENING 0x40000000
#define MDP_NO_DMA_BARRIER_START 0x20000000 #define MDP_NO_DMA_BARRIER_START 0x20000000
#define MDP_NO_DMA_BARRIER_END 0x10000000 #define MDP_NO_DMA_BARRIER_END 0x10000000
#define MDP_NO_BLIT 0x08000000 #define MDP_NO_BLIT 0x08000000
#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BLIT_WITH_DMA_BARRIERS 0x000
#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) #define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
#define MDP_BLIT_SRC_GEM 0x04000000 #define MDP_BLIT_SRC_GEM 0x04000000
#define MDP_BLIT_DST_GEM 0x02000000 #define MDP_BLIT_DST_GEM 0x02000000
#define MDP_BLIT_NON_CACHED 0x01000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BLIT_NON_CACHED 0x01000000
#define MDP_OV_PIPE_SHARE 0x00800000 #define MDP_OV_PIPE_SHARE 0x00800000
#define MDP_DEINTERLACE_ODD 0x00400000 #define MDP_DEINTERLACE_ODD 0x00400000
#define MDP_OV_PLAY_NOWAIT 0x00200000 #define MDP_OV_PLAY_NOWAIT 0x00200000
#define MDP_SOURCE_ROTATED_90 0x00100000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_SOURCE_ROTATED_90 0x00100000
#define MDP_OVERLAY_PP_CFG_EN 0x00080000 #define MDP_OVERLAY_PP_CFG_EN 0x00080000
#define MDP_BACKEND_COMPOSITION 0x00040000 #define MDP_BACKEND_COMPOSITION 0x00040000
#define MDP_BORDERFILL_SUPPORTED 0x00010000 #define MDP_BORDERFILL_SUPPORTED 0x00010000
#define MDP_SECURE_OVERLAY_SESSION 0x00008000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_SECURE_OVERLAY_SESSION 0x00008000
#define MDP_MEMORY_ID_TYPE_FB 0x00001000 #define MDP_MEMORY_ID_TYPE_FB 0x00001000
#define MDP_TRANSP_NOP 0xffffffff #define MDP_TRANSP_NOP 0xffffffff
#define MDP_ALPHA_NOP 0xff #define MDP_ALPHA_NOP 0xff
#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
#define MDP_FB_PAGE_PROTECTION_INVALID (5) #define MDP_FB_PAGE_PROTECTION_INVALID (5)
#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
struct mdp_rect { struct mdp_rect {
uint32_t x;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t x;
uint32_t y; uint32_t y;
uint32_t w; uint32_t w;
uint32_t h; uint32_t h;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_img { struct mdp_img {
uint32_t width; uint32_t width;
uint32_t height; uint32_t height;
uint32_t format;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t format;
uint32_t offset; uint32_t offset;
int memory_id; int memory_id;
uint32_t priv; uint32_t priv;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
#define MDP_CCS_RGB2YUV 0 #define MDP_CCS_RGB2YUV 0
#define MDP_CCS_YUV2RGB 1 #define MDP_CCS_YUV2RGB 1
#define MDP_CCS_SIZE 9 #define MDP_CCS_SIZE 9
#define MDP_BV_SIZE 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BV_SIZE 3
struct mdp_ccs { struct mdp_ccs {
int direction; int direction;
uint16_t ccs[MDP_CCS_SIZE]; uint16_t ccs[MDP_CCS_SIZE];
uint16_t bv[MDP_BV_SIZE];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint16_t bv[MDP_BV_SIZE];
}; };
struct mdp_csc { struct mdp_csc {
int id; int id;
uint32_t csc_mv[9];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_mv[9];
uint32_t csc_pre_bv[3]; uint32_t csc_pre_bv[3];
uint32_t csc_post_bv[3]; uint32_t csc_post_bv[3];
uint32_t csc_pre_lv[6]; uint32_t csc_pre_lv[6];
uint32_t csc_post_lv[6];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_post_lv[6];
}; };
#define MDP_BLIT_REQ_VERSION 2 #define MDP_BLIT_REQ_VERSION 2
struct mdp_blit_req { struct mdp_blit_req {
struct mdp_img src;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_img src;
struct mdp_img dst; struct mdp_img dst;
struct mdp_rect src_rect; struct mdp_rect src_rect;
struct mdp_rect dst_rect; struct mdp_rect dst_rect;
uint32_t alpha;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t alpha;
uint32_t transp_mask; uint32_t transp_mask;
uint32_t flags; uint32_t flags;
int sharpening_strength; int sharpening_strength;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_blit_req_list { struct mdp_blit_req_list {
uint32_t count; uint32_t count;
struct mdp_blit_req req[]; struct mdp_blit_req req[];
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
#define MSMFB_DATA_VERSION 2 #define MSMFB_DATA_VERSION 2
struct msmfb_data { struct msmfb_data {
uint32_t offset; uint32_t offset;
int memory_id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int memory_id;
int id; int id;
uint32_t flags; uint32_t flags;
uint32_t priv; uint32_t priv;
uint32_t iova;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t iova;
}; };
#define MSMFB_NEW_REQUEST -1 #define MSMFB_NEW_REQUEST -1
struct msmfb_overlay_data { struct msmfb_overlay_data {
uint32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t id;
struct msmfb_data data; struct msmfb_data data;
uint32_t version_key; uint32_t version_key;
struct msmfb_data plane1_data; struct msmfb_data plane1_data;
struct msmfb_data plane2_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_data plane2_data;
struct msmfb_data dst_data; struct msmfb_data dst_data;
}; };
struct msmfb_img { struct msmfb_img {
uint32_t width;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t width;
uint32_t height; uint32_t height;
uint32_t format; uint32_t format;
}; };
#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
struct msmfb_writeback_data { struct msmfb_writeback_data {
struct msmfb_data buf_info; struct msmfb_data buf_info;
struct msmfb_img img; struct msmfb_img img;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
#define MDP_PP_OPS_READ 0x2 #define MDP_PP_OPS_READ 0x2
#define MDP_PP_OPS_WRITE 0x4 #define MDP_PP_OPS_WRITE 0x4
struct mdp_qseed_cfg { struct mdp_qseed_cfg {
uint32_t table_num;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t table_num;
uint32_t ops; uint32_t ops;
uint32_t len; uint32_t len;
uint32_t *data; uint32_t *data;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_qseed_cfg_data { struct mdp_qseed_cfg_data {
uint32_t block; uint32_t block;
struct mdp_qseed_cfg qseed_data; struct mdp_qseed_cfg qseed_data;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
#define MDP_OVERLAY_PP_CSC_CFG 0x1 #define MDP_OVERLAY_PP_CSC_CFG 0x1
#define MDP_OVERLAY_PP_QSEED_CFG 0x2 #define MDP_OVERLAY_PP_QSEED_CFG 0x2
#define MDP_CSC_FLAG_ENABLE 0x1 #define MDP_CSC_FLAG_ENABLE 0x1
#define MDP_CSC_FLAG_YUV_IN 0x2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_CSC_FLAG_YUV_IN 0x2
#define MDP_CSC_FLAG_YUV_OUT 0x4 #define MDP_CSC_FLAG_YUV_OUT 0x4
struct mdp_csc_cfg { struct mdp_csc_cfg {
uint32_t flags; uint32_t flags;
uint32_t csc_mv[9];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_mv[9];
uint32_t csc_pre_bv[3]; uint32_t csc_pre_bv[3];
uint32_t csc_post_bv[3]; uint32_t csc_post_bv[3];
uint32_t csc_pre_lv[6]; uint32_t csc_pre_lv[6];
uint32_t csc_post_lv[6];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_post_lv[6];
}; };
struct mdp_csc_cfg_data { struct mdp_csc_cfg_data {
uint32_t block; uint32_t block;
struct mdp_csc_cfg csc_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_csc_cfg csc_data;
}; };
struct mdp_overlay_pp_params { struct mdp_overlay_pp_params {
uint32_t config_ops; uint32_t config_ops;
struct mdp_csc_cfg csc_cfg;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_csc_cfg csc_cfg;
struct mdp_qseed_cfg qseed_cfg[2]; struct mdp_qseed_cfg qseed_cfg[2];
}; };
struct mdp_overlay { struct mdp_overlay {
struct msmfb_img src;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_img src;
struct mdp_rect src_rect; struct mdp_rect src_rect;
struct mdp_rect dst_rect; struct mdp_rect dst_rect;
uint32_t z_order; uint32_t z_order;
uint32_t is_fg;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t is_fg;
uint32_t alpha; uint32_t alpha;
uint32_t transp_mask; uint32_t transp_mask;
uint32_t flags; uint32_t flags;
uint32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t id;
uint32_t user_data[8]; uint32_t user_data[8];
struct mdp_overlay_pp_params overlay_pp_cfg; struct mdp_overlay_pp_params overlay_pp_cfg;
}; };
struct msmfb_overlay_3d {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_overlay_3d {
uint32_t is_3d; uint32_t is_3d;
uint32_t width; uint32_t width;
uint32_t height; uint32_t height;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct msmfb_overlay_blt { struct msmfb_overlay_blt {
uint32_t enable; uint32_t enable;
uint32_t offset; uint32_t offset;
uint32_t width;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t width;
uint32_t height; uint32_t height;
uint32_t bpp; uint32_t bpp;
}; };
struct mdp_histogram {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_histogram {
uint32_t frame_cnt; uint32_t frame_cnt;
uint32_t bin_cnt; uint32_t bin_cnt;
uint32_t *r; uint32_t *r;
uint32_t *g;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t *g;
uint32_t *b; uint32_t *b;
}; };
enum { enum {
MDP_BLOCK_RESERVED = 0,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_BLOCK_RESERVED = 0,
MDP_BLOCK_OVERLAY_0, MDP_BLOCK_OVERLAY_0,
MDP_BLOCK_OVERLAY_1, MDP_BLOCK_OVERLAY_1,
MDP_BLOCK_VG_1, MDP_BLOCK_VG_1,
MDP_BLOCK_VG_2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_BLOCK_VG_2,
MDP_BLOCK_RGB_1, MDP_BLOCK_RGB_1,
MDP_BLOCK_RGB_2, MDP_BLOCK_RGB_2,
MDP_BLOCK_DMA_P, MDP_BLOCK_DMA_P,
MDP_BLOCK_DMA_S,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_BLOCK_DMA_S,
MDP_BLOCK_DMA_E, MDP_BLOCK_DMA_E,
MDP_BLOCK_OVERLAY_2, MDP_BLOCK_OVERLAY_2,
MDP_BLOCK_MAX, MDP_BLOCK_MAX,
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_histogram_start_req { struct mdp_histogram_start_req {
uint32_t block; uint32_t block;
uint8_t frame_cnt; uint8_t frame_cnt;
uint8_t bit_mask;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t bit_mask;
uint8_t num_bins; uint8_t num_bins;
}; };
struct mdp_histogram_data { struct mdp_histogram_data {
uint32_t block;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t block;
uint8_t bin_cnt; uint8_t bin_cnt;
uint32_t *c0; uint32_t *c0;
uint32_t *c1; uint32_t *c1;
uint32_t *c2;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t *c2;
uint32_t *extra_info; uint32_t *extra_info;
}; };
struct mdp_pcc_coeff { struct mdp_pcc_coeff {
uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
}; };
struct mdp_pcc_cfg_data { struct mdp_pcc_cfg_data {
uint32_t block; uint32_t block;
uint32_t ops;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t ops;
struct mdp_pcc_coeff r, g, b; struct mdp_pcc_coeff r, g, b;
}; };
enum { enum {
mdp_lut_igc,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_lut_igc,
mdp_lut_pgc, mdp_lut_pgc,
mdp_lut_hist, mdp_lut_hist,
mdp_lut_max, mdp_lut_max,
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_igc_lut_data { struct mdp_igc_lut_data {
uint32_t block; uint32_t block;
uint32_t len, ops; uint32_t len, ops;
uint32_t *c0_c1_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t *c0_c1_data;
uint32_t *c2_data; uint32_t *c2_data;
}; };
struct mdp_ar_gc_lut_data { struct mdp_ar_gc_lut_data {
uint32_t x_start;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t x_start;
uint32_t slope; uint32_t slope;
uint32_t offset; uint32_t offset;
}; };
struct mdp_pgc_lut_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_pgc_lut_data {
uint32_t block; uint32_t block;
uint32_t flags; uint32_t flags;
uint8_t num_r_stages; uint8_t num_r_stages;
uint8_t num_g_stages;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t num_g_stages;
uint8_t num_b_stages; uint8_t num_b_stages;
struct mdp_ar_gc_lut_data *r_data; struct mdp_ar_gc_lut_data *r_data;
struct mdp_ar_gc_lut_data *g_data; struct mdp_ar_gc_lut_data *g_data;
struct mdp_ar_gc_lut_data *b_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_ar_gc_lut_data *b_data;
}; };
struct mdp_hist_lut_data { struct mdp_hist_lut_data {
uint32_t block; uint32_t block;
uint32_t ops;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t ops;
uint32_t len; uint32_t len;
uint32_t *data; uint32_t *data;
}; };
struct mdp_lut_cfg_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_lut_cfg_data {
uint32_t lut_type; uint32_t lut_type;
union { union {
struct mdp_igc_lut_data igc_lut_data; struct mdp_igc_lut_data igc_lut_data;
struct mdp_pgc_lut_data pgc_lut_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_pgc_lut_data pgc_lut_data;
struct mdp_hist_lut_data hist_lut_data; struct mdp_hist_lut_data hist_lut_data;
} data; } data;
}; };
struct mdp_bl_scale_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_bl_scale_data {
uint32_t min_lvl; uint32_t min_lvl;
uint32_t scale; uint32_t scale;
}; };
enum {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
enum {
mdp_op_pcc_cfg, mdp_op_pcc_cfg,
mdp_op_csc_cfg, mdp_op_csc_cfg,
mdp_op_lut_cfg, mdp_op_lut_cfg,
mdp_op_qseed_cfg,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_op_qseed_cfg,
mdp_bl_scale_cfg, mdp_bl_scale_cfg,
mdp_op_max, mdp_op_max,
}; };
struct msmfb_mdp_pp {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_mdp_pp {
uint32_t op; uint32_t op;
union { union {
struct mdp_pcc_cfg_data pcc_cfg_data; struct mdp_pcc_cfg_data pcc_cfg_data;
struct mdp_csc_cfg_data csc_cfg_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_csc_cfg_data csc_cfg_data;
struct mdp_lut_cfg_data lut_cfg_data; struct mdp_lut_cfg_data lut_cfg_data;
struct mdp_qseed_cfg_data qseed_cfg_data; struct mdp_qseed_cfg_data qseed_cfg_data;
struct mdp_bl_scale_data bl_scale_data; struct mdp_bl_scale_data bl_scale_data;
} data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} data;
}; };
struct mdp_page_protection { struct mdp_page_protection {
uint32_t page_protection; uint32_t page_protection;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_mixer_info { struct mdp_mixer_info {
int pndx; int pndx;
int pnum; int pnum;
int ptype;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int ptype;
int mixer_num; int mixer_num;
int z_order; int z_order;
}; };
#define MAX_PIPE_PER_MIXER 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MAX_PIPE_PER_MIXER 4
struct msmfb_mixer_info_req { struct msmfb_mixer_info_req {
int mixer_num; int mixer_num;
int cnt; int cnt;
struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
}; };
enum { enum {
DISPLAY_SUBSYSTEM_ID, DISPLAY_SUBSYSTEM_ID,
ROTATOR_SUBSYSTEM_ID,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
ROTATOR_SUBSYSTEM_ID,
}; };
#endif #endif

99
libc/kernel/common/linux/v4l2-mediabus.h Normal file
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@ -0,0 +1,99 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __LINUX_V4L2_MEDIABUS_H
#define __LINUX_V4L2_MEDIABUS_H
#include <linux/types.h>
#include <linux/videodev2.h>
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
enum v4l2_mbus_pixelcode {
V4L2_MBUS_FMT_FIXED = 0x0001,
V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE = 0x1004,
V4L2_MBUS_FMT_BGR565_2X8_BE = 0x1005,
V4L2_MBUS_FMT_BGR565_2X8_LE = 0x1006,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_RGB565_2X8_BE = 0x1007,
V4L2_MBUS_FMT_RGB565_2X8_LE = 0x1008,
V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_VYUY8_1_5X8 = 0x2003,
V4L2_MBUS_FMT_YUYV8_1_5X8 = 0x2004,
V4L2_MBUS_FMT_YVYU8_1_5X8 = 0x2005,
V4L2_MBUS_FMT_UYVY8_2X8 = 0x2006,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_VYUY8_2X8 = 0x2007,
V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008,
V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009,
V4L2_MBUS_FMT_Y10_1X10 = 0x200a,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b,
V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c,
V4L2_MBUS_FMT_Y12_1X12 = 0x2013,
V4L2_MBUS_FMT_UYVY8_1X16 = 0x200f,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_VYUY8_1X16 = 0x2010,
V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011,
V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012,
V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
V4L2_MBUS_FMT_SGBRG8_1X8 = 0x3013,
V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_SRGGB8_1X8 = 0x3014,
V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b,
V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300c,
V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x3009,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8 = 0x300d,
V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_BE = 0x3003,
V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3004,
V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3005,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3006,
V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3007,
V4L2_MBUS_FMT_SGBRG10_1X10 = 0x300e,
V4L2_MBUS_FMT_SGRBG10_1X10 = 0x300a,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_SRGGB10_1X10 = 0x300f,
V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008,
V4L2_MBUS_FMT_SGBRG12_1X12 = 0x3010,
V4L2_MBUS_FMT_SGRBG12_1X12 = 0x3011,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_FMT_SRGGB12_1X12 = 0x3012,
V4L2_MBUS_FMT_JPEG_1X8 = 0x4001,
};
struct v4l2_mbus_framefmt {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
__u32 width;
__u32 height;
__u32 code;
__u32 field;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
__u32 colorspace;
__u32 reserved[7];
};
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */

722
libc/kernel/common/linux/videodev2.h
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496
libc/kernel/common/media/msm_camera.h
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94
libc/kernel/common/media/msm_isp.h
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@ -81,193 +81,213 @@
#define MSG_ID_STATS_BF 47 #define MSG_ID_STATS_BF 47
#define MSG_ID_STATS_BHIST 48 #define MSG_ID_STATS_BHIST 48
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSG_ID_RDI0_UPDATE_ACK 49
#define MSG_ID_RDI1_UPDATE_ACK 50
#define MSG_ID_RDI2_UPDATE_ACK 51
#define VFE_CMD_DUMMY_0 0 #define VFE_CMD_DUMMY_0 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SET_CLK 1 #define VFE_CMD_SET_CLK 1
#define VFE_CMD_RESET 2 #define VFE_CMD_RESET 2
#define VFE_CMD_START 3 #define VFE_CMD_START 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_TEST_GEN_START 4 #define VFE_CMD_TEST_GEN_START 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_OPERATION_CFG 5 #define VFE_CMD_OPERATION_CFG 5
#define VFE_CMD_AXI_OUT_CFG 6 #define VFE_CMD_AXI_OUT_CFG 6
#define VFE_CMD_CAMIF_CFG 7 #define VFE_CMD_CAMIF_CFG 7
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_AXI_INPUT_CFG 8 #define VFE_CMD_AXI_INPUT_CFG 8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_BLACK_LEVEL_CFG 9 #define VFE_CMD_BLACK_LEVEL_CFG 9
#define VFE_CMD_MESH_ROLL_OFF_CFG 10 #define VFE_CMD_MESH_ROLL_OFF_CFG 10
#define VFE_CMD_DEMUX_CFG 11 #define VFE_CMD_DEMUX_CFG 11
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_FOV_CFG 12 #define VFE_CMD_FOV_CFG 12
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_MAIN_SCALER_CFG 13 #define VFE_CMD_MAIN_SCALER_CFG 13
#define VFE_CMD_WB_CFG 14 #define VFE_CMD_WB_CFG 14
#define VFE_CMD_COLOR_COR_CFG 15 #define VFE_CMD_COLOR_COR_CFG 15
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RGB_G_CFG 16 #define VFE_CMD_RGB_G_CFG 16
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_LA_CFG 17 #define VFE_CMD_LA_CFG 17
#define VFE_CMD_CHROMA_EN_CFG 18 #define VFE_CMD_CHROMA_EN_CFG 18
#define VFE_CMD_CHROMA_SUP_CFG 19 #define VFE_CMD_CHROMA_SUP_CFG 19
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_MCE_CFG 20 #define VFE_CMD_MCE_CFG 20
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SK_ENHAN_CFG 21 #define VFE_CMD_SK_ENHAN_CFG 21
#define VFE_CMD_ASF_CFG 22 #define VFE_CMD_ASF_CFG 22
#define VFE_CMD_S2Y_CFG 23 #define VFE_CMD_S2Y_CFG 23
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2CbCr_CFG 24 #define VFE_CMD_S2CbCr_CFG 24
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CHROMA_SUBS_CFG 25 #define VFE_CMD_CHROMA_SUBS_CFG 25
#define VFE_CMD_OUT_CLAMP_CFG 26 #define VFE_CMD_OUT_CLAMP_CFG 26
#define VFE_CMD_FRAME_SKIP_CFG 27 #define VFE_CMD_FRAME_SKIP_CFG 27
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_1 28 #define VFE_CMD_DUMMY_1 28
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_2 29 #define VFE_CMD_DUMMY_2 29
#define VFE_CMD_DUMMY_3 30 #define VFE_CMD_DUMMY_3 30
#define VFE_CMD_UPDATE 31 #define VFE_CMD_UPDATE 31
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_BL_LVL_UPDATE 32 #define VFE_CMD_BL_LVL_UPDATE 32
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMUX_UPDATE 33 #define VFE_CMD_DEMUX_UPDATE 33
#define VFE_CMD_FOV_UPDATE 34 #define VFE_CMD_FOV_UPDATE 34
#define VFE_CMD_MAIN_SCALER_UPDATE 35 #define VFE_CMD_MAIN_SCALER_UPDATE 35
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_WB_UPDATE 36 #define VFE_CMD_WB_UPDATE 36
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_COLOR_COR_UPDATE 37 #define VFE_CMD_COLOR_COR_UPDATE 37
#define VFE_CMD_RGB_G_UPDATE 38 #define VFE_CMD_RGB_G_UPDATE 38
#define VFE_CMD_LA_UPDATE 39 #define VFE_CMD_LA_UPDATE 39
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CHROMA_EN_UPDATE 40 #define VFE_CMD_CHROMA_EN_UPDATE 40
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CHROMA_SUP_UPDATE 41 #define VFE_CMD_CHROMA_SUP_UPDATE 41
#define VFE_CMD_MCE_UPDATE 42 #define VFE_CMD_MCE_UPDATE 42
#define VFE_CMD_SK_ENHAN_UPDATE 43 #define VFE_CMD_SK_ENHAN_UPDATE 43
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2CbCr_UPDATE 44 #define VFE_CMD_S2CbCr_UPDATE 44
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2Y_UPDATE 45 #define VFE_CMD_S2Y_UPDATE 45
#define VFE_CMD_ASF_UPDATE 46 #define VFE_CMD_ASF_UPDATE 46
#define VFE_CMD_FRAME_SKIP_UPDATE 47 #define VFE_CMD_FRAME_SKIP_UPDATE 47
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAMIF_FRAME_UPDATE 48 #define VFE_CMD_CAMIF_FRAME_UPDATE 48
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AF_UPDATE 49 #define VFE_CMD_STATS_AF_UPDATE 49
#define VFE_CMD_STATS_AE_UPDATE 50 #define VFE_CMD_STATS_AE_UPDATE 50
#define VFE_CMD_STATS_AWB_UPDATE 51 #define VFE_CMD_STATS_AWB_UPDATE 51
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_RS_UPDATE 52 #define VFE_CMD_STATS_RS_UPDATE 52
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_CS_UPDATE 53 #define VFE_CMD_STATS_CS_UPDATE 53
#define VFE_CMD_STATS_SKIN_UPDATE 54 #define VFE_CMD_STATS_SKIN_UPDATE 54
#define VFE_CMD_STATS_IHIST_UPDATE 55 #define VFE_CMD_STATS_IHIST_UPDATE 55
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_4 56 #define VFE_CMD_DUMMY_4 56
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_EPOCH1_ACK 57 #define VFE_CMD_EPOCH1_ACK 57
#define VFE_CMD_EPOCH2_ACK 58 #define VFE_CMD_EPOCH2_ACK 58
#define VFE_CMD_START_RECORDING 59 #define VFE_CMD_START_RECORDING 59
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STOP_RECORDING 60 #define VFE_CMD_STOP_RECORDING 60
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_5 61 #define VFE_CMD_DUMMY_5 61
#define VFE_CMD_DUMMY_6 62 #define VFE_CMD_DUMMY_6 62
#define VFE_CMD_CAPTURE 63 #define VFE_CMD_CAPTURE 63
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_7 64 #define VFE_CMD_DUMMY_7 64
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STOP 65 #define VFE_CMD_STOP 65
#define VFE_CMD_GET_HW_VERSION 66 #define VFE_CMD_GET_HW_VERSION 66
#define VFE_CMD_GET_FRAME_SKIP_COUNTS 67 #define VFE_CMD_GET_FRAME_SKIP_COUNTS 67
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_OUTPUT1_BUFFER_ENQ 68 #define VFE_CMD_OUTPUT1_BUFFER_ENQ 68
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_OUTPUT2_BUFFER_ENQ 69 #define VFE_CMD_OUTPUT2_BUFFER_ENQ 69
#define VFE_CMD_OUTPUT3_BUFFER_ENQ 70 #define VFE_CMD_OUTPUT3_BUFFER_ENQ 70
#define VFE_CMD_JPEG_OUT_BUF_ENQ 71 #define VFE_CMD_JPEG_OUT_BUF_ENQ 71
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RAW_OUT_BUF_ENQ 72 #define VFE_CMD_RAW_OUT_BUF_ENQ 72
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RAW_IN_BUF_ENQ 73 #define VFE_CMD_RAW_IN_BUF_ENQ 73
#define VFE_CMD_STATS_AF_ENQ 74 #define VFE_CMD_STATS_AF_ENQ 74
#define VFE_CMD_STATS_AE_ENQ 75 #define VFE_CMD_STATS_AE_ENQ 75
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_ENQ 76 #define VFE_CMD_STATS_AWB_ENQ 76
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_RS_ENQ 77 #define VFE_CMD_STATS_RS_ENQ 77
#define VFE_CMD_STATS_CS_ENQ 78 #define VFE_CMD_STATS_CS_ENQ 78
#define VFE_CMD_STATS_SKIN_ENQ 79 #define VFE_CMD_STATS_SKIN_ENQ 79
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_ENQ 80 #define VFE_CMD_STATS_IHIST_ENQ 80
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_8 81 #define VFE_CMD_DUMMY_8 81
#define VFE_CMD_JPEG_ENC_CFG 82 #define VFE_CMD_JPEG_ENC_CFG 82
#define VFE_CMD_DUMMY_9 83 #define VFE_CMD_DUMMY_9 83
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AF_START 84 #define VFE_CMD_STATS_AF_START 84
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AF_STOP 85 #define VFE_CMD_STATS_AF_STOP 85
#define VFE_CMD_STATS_AE_START 86 #define VFE_CMD_STATS_AE_START 86
#define VFE_CMD_STATS_AE_STOP 87 #define VFE_CMD_STATS_AE_STOP 87
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_START 88 #define VFE_CMD_STATS_AWB_START 88
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_STOP 89 #define VFE_CMD_STATS_AWB_STOP 89
#define VFE_CMD_STATS_RS_START 90 #define VFE_CMD_STATS_RS_START 90
#define VFE_CMD_STATS_RS_STOP 91 #define VFE_CMD_STATS_RS_STOP 91
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_CS_START 92 #define VFE_CMD_STATS_CS_START 92
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_CS_STOP 93 #define VFE_CMD_STATS_CS_STOP 93
#define VFE_CMD_STATS_SKIN_START 94 #define VFE_CMD_STATS_SKIN_START 94
#define VFE_CMD_STATS_SKIN_STOP 95 #define VFE_CMD_STATS_SKIN_STOP 95
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_START 96 #define VFE_CMD_STATS_IHIST_START 96
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_STOP 97 #define VFE_CMD_STATS_IHIST_STOP 97
#define VFE_CMD_DUMMY_10 98 #define VFE_CMD_DUMMY_10 98
#define VFE_CMD_SYNC_TIMER_SETTING 99 #define VFE_CMD_SYNC_TIMER_SETTING 99
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_ASYNC_TIMER_SETTING 100 #define VFE_CMD_ASYNC_TIMER_SETTING 100
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_LIVESHOT 101 #define VFE_CMD_LIVESHOT 101
#define VFE_CMD_LA_SETUP 102 #define VFE_CMD_LA_SETUP 102
#define VFE_CMD_LINEARIZATION_CFG 103 #define VFE_CMD_LINEARIZATION_CFG 103
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3 104 #define VFE_CMD_DEMOSAICV3 104
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABCC_CFG 105 #define VFE_CMD_DEMOSAICV3_ABCC_CFG 105
#define VFE_CMD_DEMOSAICV3_DBCC_CFG 106 #define VFE_CMD_DEMOSAICV3_DBCC_CFG 106
#define VFE_CMD_DEMOSAICV3_DBPC_CFG 107 #define VFE_CMD_DEMOSAICV3_DBPC_CFG 107
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABF_CFG 108 #define VFE_CMD_DEMOSAICV3_ABF_CFG 108
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109 #define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109
#define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110 #define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110
#define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111 #define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_XBAR_CFG 112 #define VFE_CMD_XBAR_CFG 112
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_MODULE_CFG 113 #define VFE_CMD_MODULE_CFG 113
#define VFE_CMD_ZSL 114 #define VFE_CMD_ZSL 114
#define VFE_CMD_LINEARIZATION_UPDATE 115 #define VFE_CMD_LINEARIZATION_UPDATE 115
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116 #define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CLF_CFG 117 #define VFE_CMD_CLF_CFG 117
#define VFE_CMD_CLF_LUMA_UPDATE 118 #define VFE_CMD_CLF_LUMA_UPDATE 118
#define VFE_CMD_CLF_CHROMA_UPDATE 119 #define VFE_CMD_CLF_CHROMA_UPDATE 119
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_PCA_ROLL_OFF_CFG 120 #define VFE_CMD_PCA_ROLL_OFF_CFG 120
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_PCA_ROLL_OFF_UPDATE 121 #define VFE_CMD_PCA_ROLL_OFF_UPDATE 121
#define VFE_CMD_GET_REG_DUMP 122 #define VFE_CMD_GET_REG_DUMP 122
#define VFE_CMD_GET_LINEARIZATON_TABLE 123 #define VFE_CMD_GET_LINEARIZATON_TABLE 123
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124 #define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125 #define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
#define VFE_CMD_GET_RGB_G_TABLE 126 #define VFE_CMD_GET_RGB_G_TABLE 126
#define VFE_CMD_GET_LA_TABLE 127 #define VFE_CMD_GET_LA_TABLE 127
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_UPDATE 128 #define VFE_CMD_DEMOSAICV3_UPDATE 128
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_ACTIVE_REGION_CFG 129 #define VFE_CMD_ACTIVE_REGION_CFG 129
#define VFE_CMD_COLOR_PROCESSING_CONFIG 130 #define VFE_CMD_COLOR_PROCESSING_CONFIG 130
#define VFE_CMD_STATS_WB_AEC_CONFIG 131 #define VFE_CMD_STATS_WB_AEC_CONFIG 131
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_WB_AEC_UPDATE 132 #define VFE_CMD_STATS_WB_AEC_UPDATE 132
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_Y_GAMMA_CONFIG 133 #define VFE_CMD_Y_GAMMA_CONFIG 133
#define VFE_CMD_SCALE_OUTPUT1_CONFIG 134 #define VFE_CMD_SCALE_OUTPUT1_CONFIG 134
#define VFE_CMD_SCALE_OUTPUT2_CONFIG 135 #define VFE_CMD_SCALE_OUTPUT2_CONFIG 135
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAPTURE_RAW 136 #define VFE_CMD_CAPTURE_RAW 136
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STOP_LIVESHOT 137 #define VFE_CMD_STOP_LIVESHOT 137
#define VFE_CMD_RECONFIG_VFE 138 #define VFE_CMD_RECONFIG_VFE 138
#define VFE_CMD_STATS_REQBUF 139 #define VFE_CMD_STATS_REQBUF 139
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_ENQUEUEBUF 140 #define VFE_CMD_STATS_ENQUEUEBUF 140
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_FLUSH_BUFQ 141 #define VFE_CMD_STATS_FLUSH_BUFQ 141
#define VFE_CMD_STATS_UNREGBUF 142 #define VFE_CMD_STATS_UNREGBUF 142
#define VFE_CMD_STATS_BG_START 143 #define VFE_CMD_STATS_BG_START 143
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_BG_STOP 144 #define VFE_CMD_STATS_BG_STOP 144
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_BF_START 145 #define VFE_CMD_STATS_BF_START 145
#define VFE_CMD_STATS_BF_STOP 146 #define VFE_CMD_STATS_BF_STOP 146
#define VFE_CMD_STATS_BHIST_START 147 #define VFE_CMD_STATS_BHIST_START 147
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_BHIST_STOP 148 #define VFE_CMD_STATS_BHIST_STOP 148
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RESET_2 149 #define VFE_CMD_RESET_2 149
#define VFE_CMD_FOV_ENC_CFG 150
#define VFE_CMD_FOV_VIEW_CFG 151
#define VFE_CMD_FOV_ENC_UPDATE 152
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_FOV_VIEW_UPDATE 153
#define VFE_CMD_SCALER_ENC_CFG 154
#define VFE_CMD_SCALER_VIEW_CFG 155
#define VFE_CMD_SCALER_ENC_UPDATE 156
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SCALER_VIEW_UPDATE 157
#define VFE_CMD_COLORXFORM_ENC_CFG 158
#define VFE_CMD_COLORXFORM_VIEW_CFG 159
#define VFE_CMD_COLORXFORM_ENC_UPDATE 160
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_COLORXFORM_VIEW_UPDATE 161
#define VFE_CMD_TEST_GEN_CFG 162
struct msm_isp_cmd { struct msm_isp_cmd {
int32_t id; int32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */

65
libc/kernel/common/media/v4l2-mediabus.h Normal file
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@ -0,0 +1,65 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef V4L2_MEDIABUS_H
#define V4L2_MEDIABUS_H
#include <linux/v4l2-mediabus.h>
#define V4L2_MBUS_MASTER (1 << 0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_SLAVE (1 << 1)
#define V4L2_MBUS_HSYNC_ACTIVE_HIGH (1 << 2)
#define V4L2_MBUS_HSYNC_ACTIVE_LOW (1 << 3)
#define V4L2_MBUS_VSYNC_ACTIVE_HIGH (1 << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_VSYNC_ACTIVE_LOW (1 << 5)
#define V4L2_MBUS_PCLK_SAMPLE_RISING (1 << 6)
#define V4L2_MBUS_PCLK_SAMPLE_FALLING (1 << 7)
#define V4L2_MBUS_DATA_ACTIVE_HIGH (1 << 8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_DATA_ACTIVE_LOW (1 << 9)
#define V4L2_MBUS_FIELD_EVEN_HIGH (1 << 10)
#define V4L2_MBUS_FIELD_EVEN_LOW (1 << 11)
#define V4L2_MBUS_CSI2_1_LANE (1 << 0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_CSI2_2_LANE (1 << 1)
#define V4L2_MBUS_CSI2_3_LANE (1 << 2)
#define V4L2_MBUS_CSI2_4_LANE (1 << 3)
#define V4L2_MBUS_CSI2_CHANNEL_0 (1 << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_CSI2_CHANNEL_1 (1 << 5)
#define V4L2_MBUS_CSI2_CHANNEL_2 (1 << 6)
#define V4L2_MBUS_CSI2_CHANNEL_3 (1 << 7)
#define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK (1 << 8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK (1 << 9)
#define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | V4L2_MBUS_CSI2_2_LANE | V4L2_MBUS_CSI2_3_LANE | V4L2_MBUS_CSI2_4_LANE)
#define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | V4L2_MBUS_CSI2_CHANNEL_1 | V4L2_MBUS_CSI2_CHANNEL_2 | V4L2_MBUS_CSI2_CHANNEL_3)
enum v4l2_mbus_type {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
V4L2_MBUS_PARALLEL,
V4L2_MBUS_BT656,
V4L2_MBUS_CSI2,
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct v4l2_mbus_config {
enum v4l2_mbus_type type;
unsigned int flags;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif