Atomic/SMP update. [manual merge to dalvik-dev]
Added an underscore to _ARM_HAVE_LDREX_STREX to make it match the others. Added __ARM_HAVE_DMB and __ARM_HAVE_LDREXD when appropriate. Fixed some typos. Change-Id: I85ca1980192b509a09190dd84f1ca4a361e9c3a2
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@ -143,7 +143,7 @@ __atomic_inc:
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/* r0(new) r1(addr) -> r0(old) */
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/* replaced swp instruction with ldrex/strex for ARMv6 & ARMv7 */
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__atomic_swap:
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#if defined (_ARM_HAVE_LDREX_STREX)
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#if defined (__ARM_HAVE_LDREX_STREX)
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1: ldrex r2, [r1]
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strex r3, r0, [r1]
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teq r3, #0
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@ -38,7 +38,7 @@
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* IMPORTANT: We have no intention to support anything below an ARMv4T !
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*/
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/* _ARM_ARCH_REVISION is a number corresponding to the ARM revision
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/* __ARM_ARCH__ is a number corresponding to the ARM revision
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* we're going to support
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*
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* it looks like our toolchain doesn't define __ARM_ARCH__
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@ -142,18 +142,32 @@
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*
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* ldr pc, [<some address>]
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*
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* note that this affects any instruction that explicitely changes the
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* note that this affects any instruction that explicitly changes the
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* value of the pc register, including ldm { ...,pc } or 'add pc, #offset'
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*/
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#if __ARM_ARCH__ >= 5
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# define __ARM_HAVE_PC_INTERWORK
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#endif
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/* define _ARM_HAVE_LDREX_STREX for ARMv6 and ARMv7 architecure to be
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* used in replacement of depricated swp instruction
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/* define __ARM_HAVE_LDREX_STREX for ARMv6 and ARMv7 architecture to be
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* used in replacement of deprecated swp instruction
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*/
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#if __ARM_ARCH__ >= 6
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# define _ARM_HAVE_LDREX_STREX
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# define __ARM_HAVE_LDREX_STREX
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#endif
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/* define __ARM_HAVE_DMB for ARMv7 architecture
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*/
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#if __ARM_ARCH__ >= 7
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# define __ARM_HAVE_DMB
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#endif
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/* define __ARM_HAVE_LDREXD for ARMv7 architecture
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* (also present in ARMv6K, but not implemented in ARMv7-M, neither of which
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* we care about)
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*/
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#if __ARM_ARCH__ >= 7
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# define __ARM_HAVE_LDREXD
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#endif
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