Merge "Use ENTRY and EXIT macros for strcmp, memcpy, atexit."

libc/arch-arm/bionic/atexit.S

@@ -37,16 +37,10 @@
 	.eabi_attribute 26, 2
 	.eabi_attribute 30, 4
 	.eabi_attribute 18, 4
-	.code	16
-	.section	.text.atexit,"ax",%progbits
-	.align	2
-	.global	atexit
 	.hidden	atexit
 	.code	16
 	.thumb_func
-	.type	atexit, %function
+ENTRY(atexit)
-atexit:
-	.fnstart
 .LFB0:
 	.save	{r4, lr}
 	push	{r4, lr}
@@ -64,6 +58,5 @@ atexit:
 .L3:
 	.word	__dso_handle-(.LPIC0+4)
 .LFE0:
-	.fnend
+END(atexit)
-	.size	atexit, .-atexit
 #endif

libc/arch-arm/bionic/memcpy.S

@@ -34,16 +34,11 @@
         .text
         .fpu    neon
 
-        .global memcpy
-        .type memcpy, %function
-        .align 4
-
 /* a prefetch distance of 4 cache-lines works best experimentally */
 #define CACHE_LINE_SIZE     64
 #define PREFETCH_DISTANCE   (CACHE_LINE_SIZE*4)
 
-memcpy:
+ENTRY(memcpy)
-        .fnstart
         .save       {r0, lr}
         stmfd       sp!, {r0, lr}
 

libc/arch-arm/bionic/strcmp.S

@@ -28,13 +28,10 @@
  */
 
 #include <machine/cpu-features.h>
+#include <machine/asm.h>
 
 	.text
 
-	.global strcmp
-	.type strcmp, %function
-	.align 4
-
 #ifdef __ARMEB__
 #define SHFT2LSB lsl
 #define SHFT2LSBEQ lsleq
@@ -54,8 +51,7 @@
 #define magic1(REG) REG
 #define magic2(REG) REG, lsl #7
 
-strcmp:
+ENTRY(strcmp)
-	.fnstart
 	PLD(r0, #0)
 	PLD(r1, #0)
 	eor	r2, r0, r1
@@ -136,7 +132,6 @@ strcmp:
 #endif
 	ldr	r4, [sp], #4
 	bx	lr
-	.fnend
 
 .Lstrcmp_unaligned:
 	wp1 .req r0
@@ -319,3 +314,4 @@ strcmp:
 	ldr	r4, [sp], #4
 	ldr	r5, [sp], #4
 	bx	lr
+END(strcmp)