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Clean up cacheflush.

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No cacheflush for LP64; use the GCC builtin instead. Clean up the
32-bit MIPS implementation now we no longer need to worry about
old versions of GCC.

Bug: 12924756
Change-Id: Ie23955b3ec194e226c4b2bce35b11d5e061f4753
This commit is contained in:
Elliott Hughes
2014-02-10 18:37:02 -08:00
parent 71e4466b10
commit a6ecba4d23
6 changed files with 30 additions and 198 deletions
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1
libc/arch-arm64/arm64.mk
View File

@@ -1,7 +1,6 @@
_LIBC_ARCH_COMMON_SRC_FILES := \ _LIBC_ARCH_COMMON_SRC_FILES := \
arch-arm64/bionic/__bionic_clone.S \ arch-arm64/bionic/__bionic_clone.S \
arch-arm64/bionic/bzero_arm64.c \ arch-arm64/bionic/bzero_arm64.c \
arch-arm64/bionic/cacheflush_arm64.c \
arch-arm64/bionic/_exit_with_stack_teardown.S \ arch-arm64/bionic/_exit_with_stack_teardown.S \
arch-arm64/bionic/futex_arm64.S \ arch-arm64/bionic/futex_arm64.S \
arch-arm64/bionic/__get_sp.S \ arch-arm64/bionic/__get_sp.S \

33
libc/arch-arm64/bionic/cacheflush_arm64.c
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@@ -1,33 +0,0 @@
/*
* Copyright (C) 2013 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/* TODO: We can implement a specialised cacheflush() */
int cacheflush (long start, long end, long flags __attribute__((unused))) {
__builtin___clear_cache((char*) start, (char*) end);
return 0;
}

88
libc/arch-mips/bionic/cacheflush.cpp
View File

@@ -25,75 +25,39 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. * SUCH DAMAGE.
*/ */
#include <unistd.h> #include <unistd.h>
#include <sys/cachectl.h> #include <sys/cachectl.h>
#ifdef DEBUG
#include "private/libc_logging.h" #include "private/libc_logging.h"
#define XLOG(...) __libc_format_log(ANDROID_LOG_DEBUG,"libc-cacheflush",__VA_ARGS__)
#endif
/* // Linux historically defines a cacheflush(3) routine for MIPS
* Linux historically defines a cacheflush(3) routine for MIPS // with this signature:
* with this signature:
* int cacheflush(char *addr, int nbytes, int cache);
*
* Android defines an alternate cacheflush routine which exposes the
* ARM system call interface:
* int cacheflush (long start, long end, long flags)
*
* This is an attempt to maintain compatibility between the historical MIPS
* usage for software previously ported to MIPS and Android specific
* uses of cacheflush()
*
* Use the gcc __clear_cache builtin if possible. This will generate inline synci
* instructions if available or call _flush_cache(start, len, BCACHE) directly
*/
#if defined (__GNUC__) // int cacheflush(char *addr, int nbytes, int cache);
#define GCC_VERSION ((__GNUC__*10000) + __GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
#endif
/* This is the Android signature */ // Android defines an alternate cacheflush routine which exposes the
int cacheflush (long start, long end, long /*flags*/) { // ARM system call interface:
if (end < start) {
/*
* It looks like this is really MIPS style cacheflush call
* start => addr
* end => nbytes
*/
#ifdef DEBUG
static int warned = 0;
if (!warned) {
XLOG("called with (start,len) instead of (start,end)");
warned = 1;
}
#endif
end += start;
}
#if !defined(ARCH_MIPS_USE_FLUSHCACHE_SYSCALL) && \ // int cacheflush (long start, long end, long flags)
defined(GCC_VERSION) && (GCC_VERSION >= 40300)
#if (__mips_isa_rev >= 2) && (GCC_VERSION < 40403) // This is an attempt to maintain compatibility between the historical MIPS
/* // usage for software previously ported to MIPS and Android specific
* Modify "start" and "end" to avoid GCC 4.3.0-4.4.2 bug in // uses of cacheflush().
* mips_expand_synci_loop that may execute synci one more time.
* "start" points to the first byte of the cache line. int cacheflush(long start, long end, long /*flags*/) {
* "end" points to the last byte of the line before the last cache line. if (end < start) {
* Because size is always a multiple of 4, this is safe to set // It looks like this is really a MIPS-style cacheflush call.
* "end" to the last byte. static bool warned = false;
*/ if (!warned) {
{ __libc_format_log(ANDROID_LOG_WARN, "libc", "cacheflush called with (start,len) instead of (start,end)");
int lineSize; warned = true;
asm("rdhwr %0, $1" : "=r" (lineSize)); }
start = start & (-lineSize); end += start;
end = (end & (-lineSize)) - 1; }
}
#endif // Use the GCC builtin. This will generate inline synci instructions if available,
__builtin___clear_cache((char *)start, (char *)end); // or call _flush_cache(start, len, BCACHE) directly.
#else __builtin___clear_cache(reinterpret_cast<char*>(start), reinterpret_cast<char*>(end));
_flush_cache((char *)start, end-start, BCACHE); return 0;
#endif
return 0;
} }

99
libc/arch-mips64/bionic/cacheflush.cpp
View File

@@ -1,99 +0,0 @@
/*
* Copyright (C) 2008 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <unistd.h>
#include <sys/cachectl.h>
#ifdef DEBUG
#include "private/libc_logging.h"
#define XLOG(...) __libc_format_log(ANDROID_LOG_DEBUG,"libc-cacheflush",__VA_ARGS__)
#endif
/*
* Linux historically defines a cacheflush(3) routine for MIPS
* with this signature:
* int cacheflush(char *addr, int nbytes, int cache);
*
* Android defines an alternate cacheflush routine which exposes the
* ARM system call interface:
* int cacheflush (long start, long end, long flags)
*
* This is an attempt to maintain compatibility between the historical MIPS
* usage for software previously ported to MIPS and Android specific
* uses of cacheflush()
*
* Use the gcc __clear_cache builtin if possible. This will generate inline synci
* instructions if available or call _flush_cache(start, len, BCACHE) directly
*/
#if defined (__GNUC__)
#define GCC_VERSION ((__GNUC__*10000) + __GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
#endif
/* This is the Android signature */
int cacheflush (long start, long end, long /*flags*/) {
if (end < start) {
/*
* It looks like this is really MIPS style cacheflush call
* start => addr
* end => nbytes
*/
#ifdef DEBUG
static int warned = 0;
if (!warned) {
XLOG("called with (start,len) instead of (start,end)");
warned = 1;
}
#endif
end += start;
}
#if !defined(ARCH_MIPS_USE_FLUSHCACHE_SYSCALL) && \
defined(GCC_VERSION) && (GCC_VERSION >= 40300)
#if (__mips_isa_rev >= 2) && (GCC_VERSION < 40403)
/*
* Modify "start" and "end" to avoid GCC 4.3.0-4.4.2 bug in
* mips_expand_synci_loop that may execute synci one more time.
* "start" points to the first byte of the cache line.
* "end" points to the last byte of the line before the last cache line.
* Because size is always a multiple of 4, this is safe to set
* "end" to the last byte.
*/
{
int lineSize;
asm("rdhwr %0, $1" : "=r" (lineSize));
start = start & (-lineSize);
end = (end & (-lineSize)) - 1;
}
#endif
__builtin___clear_cache((char *)start, (char *)end);
#else
_flush_cache((char *)start, end-start, BCACHE);
#endif
return 0;
}

1
libc/arch-mips64/mips64.mk
View File

@@ -1,7 +1,6 @@
_LIBC_ARCH_COMMON_SRC_FILES := \ _LIBC_ARCH_COMMON_SRC_FILES := \
arch-mips64/bionic/__bionic_clone.S \ arch-mips64/bionic/__bionic_clone.S \
arch-mips64/bionic/bzero.S \ arch-mips64/bionic/bzero.S \
arch-mips64/bionic/cacheflush.cpp \
arch-mips64/bionic/_exit_with_stack_teardown.S \ arch-mips64/bionic/_exit_with_stack_teardown.S \
arch-mips64/bionic/futex_mips.S \ arch-mips64/bionic/futex_mips.S \
arch-mips64/bionic/__get_sp.S \ arch-mips64/bionic/__get_sp.S \

6
libc/include/unistd.h
View File

@@ -185,8 +185,10 @@ extern int sysconf(int name);
extern int daemon(int, int); extern int daemon(int, int);
/* A special syscall that is only available on the ARM, not x86 function. */ #if defined(__arm__) || (defined(__mips__) && !defined(__LP64__))
extern int cacheflush(long start, long end, long flags); extern int cacheflush(long, long, long);
/* __attribute__((deprecated("use __builtin___clear_cache instead"))); */
#endif
extern pid_t tcgetpgrp(int fd); extern pid_t tcgetpgrp(int fd);
extern int tcsetpgrp(int fd, pid_t _pid); extern int tcsetpgrp(int fd, pid_t _pid);