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The Android Open Source Project
254
libm/include/sparc64/fenv.h
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254
libm/include/sparc64/fenv.h
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/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/sparc64/fenv.h,v 1.3 2005/03/16 19:03:46 das Exp $
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/_types.h>
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typedef __uint64_t fenv_t;
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typedef __uint64_t fexcept_t;
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/* Exception flags */
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#define FE_INVALID 0x00000200
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#define FE_DIVBYZERO 0x00000040
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#define FE_OVERFLOW 0x00000100
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#define FE_UNDERFLOW 0x00000080
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#define FE_INEXACT 0x00000020
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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/*
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* Rounding modes
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*
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* We can't just use the hardware bit values here, because that would
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* make FE_UPWARD and FE_DOWNWARD negative, which is not allowed.
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*/
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#define FE_TONEAREST 0x0
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#define FE_TOWARDZERO 0x1
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#define FE_UPWARD 0x2
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#define FE_DOWNWARD 0x3
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#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
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FE_UPWARD | FE_TOWARDZERO)
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#define _ROUND_SHIFT 30
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__BEGIN_DECLS
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/* Default floating-point environment */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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/* We need to be able to map status flag positions to mask flag positions */
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#define _FPUSW_SHIFT 18
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#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
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#define __ldxfsr(__r) __asm __volatile("ldx %0, %%fsr" : : "m" (__r))
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#define __stxfsr(__r) __asm __volatile("stx %%fsr, %0" : "=m" (*(__r)))
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static __inline int
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feclearexcept(int __excepts)
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{
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fexcept_t __r;
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__stxfsr(&__r);
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__r &= ~__excepts;
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__ldxfsr(__r);
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return (0);
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}
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static __inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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fexcept_t __r;
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__stxfsr(&__r);
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*__flagp = __r & __excepts;
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return (0);
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}
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static __inline int
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fesetexceptflag(const fexcept_t *__flagp, int __excepts)
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{
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fexcept_t __r;
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__stxfsr(&__r);
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__r &= ~__excepts;
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__r |= *__flagp & __excepts;
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__ldxfsr(__r);
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return (0);
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}
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/*
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* In contrast with the ia64 platform, it seems to be worthwhile to
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* inline this function on sparc64 even when the arguments are not
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* compile-time constants. Perhaps this depends on the register window.
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*/
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static __inline int
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feraiseexcept(int __excepts)
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{
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volatile double d;
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/*
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* With a compiler that supports the FENV_ACCESS pragma
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* properly, simple expressions like '0.0 / 0.0' should
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* be sufficient to generate traps. Unfortunately, we
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* need to bring a volatile variable into the equation
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* to prevent incorrect optimizations.
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*/
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if (__excepts & FE_INVALID) {
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d = 0.0;
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d = 0.0 / d;
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}
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if (__excepts & FE_DIVBYZERO) {
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d = 0.0;
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d = 1.0 / d;
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}
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if (__excepts & FE_OVERFLOW) {
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d = 0x1.ffp1023;
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d *= 2.0;
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}
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if (__excepts & FE_UNDERFLOW) {
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d = 0x1p-1022;
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d /= 0x1p1023;
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}
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if (__excepts & FE_INEXACT) {
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d = 0x1p-1022;
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d += 1.0;
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}
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return (0);
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}
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static __inline int
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fetestexcept(int __excepts)
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{
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fexcept_t __r;
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__stxfsr(&__r);
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return (__r & __excepts);
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}
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static __inline int
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fegetround(void)
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{
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fenv_t __r;
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__stxfsr(&__r);
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return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);
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}
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static __inline int
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fesetround(int __round)
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{
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fenv_t __r;
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if (__round & ~_ROUND_MASK)
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return (-1);
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__stxfsr(&__r);
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__r &= ~(_ROUND_MASK << _ROUND_SHIFT);
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__r |= __round << _ROUND_SHIFT;
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__ldxfsr(__r);
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return (0);
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}
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static __inline int
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fegetenv(fenv_t *__envp)
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{
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__stxfsr(__envp);
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return (0);
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}
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static __inline int
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feholdexcept(fenv_t *__envp)
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{
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fenv_t __r;
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__stxfsr(&__r);
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*__envp = __r;
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__r &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
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__ldxfsr(__r);
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return (0);
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}
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static __inline int
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fesetenv(const fenv_t *__envp)
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{
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__ldxfsr(*__envp);
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return (0);
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}
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static __inline int
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feupdateenv(const fenv_t *__envp)
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{
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fexcept_t __r;
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__stxfsr(&__r);
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__ldxfsr(*__envp);
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feraiseexcept(__r & FE_ALL_EXCEPT);
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return (0);
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}
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#if __BSD_VISIBLE
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static __inline int
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feenableexcept(int __mask)
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{
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fenv_t __old_r, __new_r;
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__stxfsr(&__old_r);
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__new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
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__ldxfsr(__new_r);
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return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
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}
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static __inline int
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fedisableexcept(int __mask)
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{
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fenv_t __old_r, __new_r;
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__stxfsr(&__old_r);
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__new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
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__ldxfsr(__new_r);
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return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
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}
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static __inline int
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fegetexcept(void)
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{
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fenv_t __r;
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__stxfsr(&__r);
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return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
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}
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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