From cb4c615bb9583d78efc6d00115ed5b8f1113ce2d Mon Sep 17 00:00:00 2001
From: Elliott Hughes <enh@google.com>
Date: Wed, 3 Dec 2014 17:07:01 -0800
Subject: [PATCH] Remove __ARM_HAVE_VFP.

Bug: 18556103
Change-Id: I6d4cc6a1b359ad2df1ce6687fd26f392059f6efd
---
 libc/arch-arm/bionic/_setjmp.S               | 4 ----
 libc/arch-arm/bionic/setjmp.S                | 8 --------
 libc/arch-arm/include/machine/cpu-features.h | 6 ------
 3 files changed, 18 deletions(-)

diff --git a/libc/arch-arm/bionic/_setjmp.S b/libc/arch-arm/bionic/_setjmp.S
index 7d637fd86..51dfc0af7 100644
--- a/libc/arch-arm/bionic/_setjmp.S
+++ b/libc/arch-arm/bionic/_setjmp.S
@@ -59,14 +59,12 @@ ENTRY(_setjmp)
 	add     r1, r0, #(_JB_CORE_BASE * 4)
 	stmia   r1, {r4-r14}
 
-#ifdef __ARM_HAVE_VFP
 	/* Store floating-point registers */
 	add     r1, r0, #(_JB_FLOAT_BASE * 4)
 	vstmia  r1, {d8-d15}
 	/* Store floating-point state */
 	fmrx    r1, fpscr
 	str     r1, [r0, #(_JB_FLOAT_STATE * 4)]
-#endif  /* __ARM_HAVE_VFP */
 
         mov	r0, #0x00000000
         bx      lr
@@ -81,14 +79,12 @@ ENTRY(_longjmp)
 	teq	r2, r3
 	bne	botch
 
-#ifdef __ARM_HAVE_VFP
 	/* Restore floating-point registers */
 	add     r2, r0, #(_JB_FLOAT_BASE * 4)
 	vldmia  r2, {d8-d15}
 	/* Restore floating-point state */
 	ldr     r2, [r0, #(_JB_FLOAT_STATE * 4)]
 	fmxr    fpscr, r2
-#endif /* __ARM_HAVE_VFP */
 
 	/* Restore core registers */
 	add     r2, r0, #(_JB_CORE_BASE * 4)
diff --git a/libc/arch-arm/bionic/setjmp.S b/libc/arch-arm/bionic/setjmp.S
index 0c9082c2c..435ef8650 100644
--- a/libc/arch-arm/bionic/setjmp.S
+++ b/libc/arch-arm/bionic/setjmp.S
@@ -72,14 +72,12 @@ ENTRY(setjmp)
 	add     r1, r0, #(_JB_CORE_BASE * 4)
 	stmia   r1, {r4-r14}
 
-#ifdef __ARM_HAVE_VFP
 	/* Store floating-point registers */
 	add     r1, r0, #(_JB_FLOAT_BASE * 4)
 	vstmia  r1, {d8-d15}
 	/* Store floating-point state */
 	fmrx    r1, fpscr
 	str     r1, [r0, #(_JB_FLOAT_STATE * 4)]
-#endif  /* __ARM_HAVE_VFP */
 
 	mov	r0, #0x00000000
 	bx      lr
@@ -115,14 +113,12 @@ ENTRY(longjmp)
 	ldmfd	sp!, {r0, r1, r14}
 	.cfi_def_cfa_offset 0
 
-#ifdef __ARM_HAVE_VFP
 	/* Restore floating-point registers */
 	add     r2, r0, #(_JB_FLOAT_BASE * 4)
 	vldmia  r2, {d8-d15}
 	/* Restore floating-point state */
 	ldr     r2, [r0, #(_JB_FLOAT_STATE * 4)]
 	fmxr    fpscr, r2
-#endif /* __ARM_HAVE_VFP */
 
 	/* Restore core registers */
 	add     r2, r0, #(_JB_CORE_BASE * 4)
@@ -139,11 +135,7 @@ ENTRY(longjmp)
 	teq	r0, #0x00000000
 	moveq	r0, #0x00000001
         bx      lr
-#ifdef __ARM_26__
 	mov	r15, r14
-#else
-	mov	r15, r14
-#endif
 
 	/* validation failed, die die die. */
 botch:
diff --git a/libc/arch-arm/include/machine/cpu-features.h b/libc/arch-arm/include/machine/cpu-features.h
index ef62010e6..bf9a75d34 100644
--- a/libc/arch-arm/include/machine/cpu-features.h
+++ b/libc/arch-arm/include/machine/cpu-features.h
@@ -53,12 +53,6 @@
 #  endif
 #endif
 
-/* define _ARM_HAVE_VFP if we have VFPv3
- */
-#if __ARM_ARCH__ >= 7 && defined __VFP_FP__
-#  define __ARM_HAVE_VFP
-#endif
-
 /* define _ARM_HAVE_NEON for ARMv7 architecture if we support the
  * Neon SIMD instruction set extensions. This also implies
  * that VFPv3-D32 is supported.