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Clean up the arm64 setjmp.

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Note that this doesn't address the fact that we don't save/restore the
real-time signals. But it does let us pass the tests we currently fail.

Bug: 16918359
Change-Id: I063a6926164289a71026a412da7f5dd2ca9a74b3
This commit is contained in:
Elliott Hughes
2014-12-05 12:17:25 -08:00
parent 2421406711
commit 9fb536de97
7 changed files with 142 additions and 308 deletions
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45
libc/arch-arm64/include/machine/setjmp.h
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@@ -26,48 +26,5 @@
* SUCH DAMAGE.
*/
/*
* machine/setjmp.h: machine dependent setjmp-related information.
*/
/* _JBLEN is the size of a jmp_buf in longs(64bit on AArch64) */
/* _JBLEN is the size of a jmp_buf in longs (64bit on AArch64) */
#define _JBLEN 32
/* According to AARCH64 PCS document we need to save the following
* registers:
*
* Core x19 - x30, sp (see section 5.1.1)
* VFP d8 - d15 (see section 5.1.2)
*
* NOTE: All the registers saved here will have 64bit vales (except FPSR).
* AAPCS mandates that the higher part of q registers does not need to
* be saveved by the callee.
*/
/* The structure of jmp_buf for AArch64:
*
* NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
* below computes the offsets in words(32bit).
*
* word name description
* 0 magic magic number
* 1 sigmask signal mask (not used with _setjmp / _longjmp)
* 2 core_base base of core registers (x19-x30, sp)
* 28 float_base base of float registers (d8-d15)
* 44 reserved reserved entries (room to grow)
* 64
*
*
* NOTE: The instructions that load/store core/vfp registers expect 8-byte
* alignment. Contrary to the previous setjmp header for ARM we do not
* need to save status/control registers for VFP (it is not a
* requirement for setjmp).
*/
#define _JB_MAGIC 0
#define _JB_SIGMASK (_JB_MAGIC+1)
#define _JB_CORE_BASE (_JB_SIGMASK+1)
#define _JB_FLOAT_BASE (_JB_CORE_BASE + (31-19+1)*2)
#define _JB_MAGIC__SETJMP 0x53657200
#define _JB_MAGIC_SETJMP 0x53657201