Merge "Fix generic __memcpy_chk implementation."
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commit
8f41d3d3bc
@ -39,7 +39,7 @@
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ENTRY(__memcpy_chk)
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ENTRY(__memcpy_chk)
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cmp r2, r3
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cmp r2, r3
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bgt fortify_check_failed
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bhi __memcpy_chk_fail
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// Fall through to memcpy...
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// Fall through to memcpy...
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END(__memcpy_chk)
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END(__memcpy_chk)
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@ -49,11 +49,14 @@ ENTRY(memcpy)
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* ARM ABI. Since we have to save R0, we might as well save R4
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* ARM ABI. Since we have to save R0, we might as well save R4
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* which we can use for better pipelining of the reads below
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* which we can use for better pipelining of the reads below
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*/
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*/
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.save {r0, r4, lr}
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stmfd sp!, {r0, r4, lr}
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stmfd sp!, {r0, r4, lr}
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.cfi_def_cfa_offset 12
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.cfi_rel_offset r0, 0
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.cfi_rel_offset r4, 4
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.cfi_rel_offset lr, 8
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/* Making room for r5-r11 which will be spilled later */
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/* Making room for r5-r11 which will be spilled later */
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.pad #28
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sub sp, sp, #28
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sub sp, sp, #28
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.cfi_adjust_cfa_offset 28
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// preload the destination because we'll align it to a cache line
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// preload the destination because we'll align it to a cache line
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// with small writes. Also start the source "pump".
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// with small writes. Also start the source "pump".
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@ -63,14 +66,14 @@ ENTRY(memcpy)
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/* it simplifies things to take care of len<4 early */
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/* it simplifies things to take care of len<4 early */
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cmp r2, #4
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cmp r2, #4
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blo copy_last_3_and_return
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blo .Lcopy_last_3_and_return
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/* compute the offset to align the source
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/* compute the offset to align the source
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* offset = (4-(src&3))&3 = -src & 3
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* offset = (4-(src&3))&3 = -src & 3
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*/
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*/
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rsb r3, r1, #0
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rsb r3, r1, #0
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ands r3, r3, #3
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ands r3, r3, #3
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beq src_aligned
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beq .Lsrc_aligned
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/* align source to 32 bits. We need to insert 2 instructions between
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/* align source to 32 bits. We need to insert 2 instructions between
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* a ldr[b|h] and str[b|h] because byte and half-word instructions
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* a ldr[b|h] and str[b|h] because byte and half-word instructions
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@ -85,12 +88,12 @@ ENTRY(memcpy)
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strcsb r4, [r0], #1
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strcsb r4, [r0], #1
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strcsb r12,[r0], #1
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strcsb r12,[r0], #1
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src_aligned:
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.Lsrc_aligned:
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/* see if src and dst are aligned together (congruent) */
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/* see if src and dst are aligned together (congruent) */
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eor r12, r0, r1
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eor r12, r0, r1
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tst r12, #3
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tst r12, #3
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bne non_congruent
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bne .Lnon_congruent
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/* Use post-incriment mode for stm to spill r5-r11 to reserved stack
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/* Use post-incriment mode for stm to spill r5-r11 to reserved stack
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* frame. Don't update sp.
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* frame. Don't update sp.
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@ -100,7 +103,7 @@ src_aligned:
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/* align the destination to a cache-line */
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/* align the destination to a cache-line */
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rsb r3, r0, #0
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rsb r3, r0, #0
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ands r3, r3, #0x1C
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ands r3, r3, #0x1C
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beq congruent_aligned32
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beq .Lcongruent_aligned32
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cmp r3, r2
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cmp r3, r2
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andhi r3, r2, #0x1C
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andhi r3, r2, #0x1C
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@ -115,14 +118,14 @@ src_aligned:
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strne r10,[r0], #4
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strne r10,[r0], #4
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sub r2, r2, r3
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sub r2, r2, r3
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congruent_aligned32:
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.Lcongruent_aligned32:
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/*
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/*
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* here source is aligned to 32 bytes.
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* here source is aligned to 32 bytes.
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*/
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*/
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cached_aligned32:
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.Lcached_aligned32:
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subs r2, r2, #32
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subs r2, r2, #32
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blo less_than_32_left
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blo .Lless_than_32_left
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/*
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/*
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* We preload a cache-line up to 64 bytes ahead. On the 926, this will
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* We preload a cache-line up to 64 bytes ahead. On the 926, this will
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@ -160,10 +163,7 @@ cached_aligned32:
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add r2, r2, #32
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add r2, r2, #32
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.Lless_than_32_left:
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less_than_32_left:
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/*
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/*
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* less than 32 bytes left at this point (length in r2)
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* less than 32 bytes left at this point (length in r2)
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*/
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*/
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@ -197,7 +197,7 @@ less_than_32_left:
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/********************************************************************/
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/********************************************************************/
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non_congruent:
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.Lnon_congruent:
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/*
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/*
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* here source is aligned to 4 bytes
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* here source is aligned to 4 bytes
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* but destination is not.
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* but destination is not.
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@ -207,9 +207,9 @@ non_congruent:
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* partial words in the shift queue)
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* partial words in the shift queue)
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*/
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*/
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cmp r2, #4
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cmp r2, #4
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blo copy_last_3_and_return
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blo .Lcopy_last_3_and_return
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/* Use post-incriment mode for stm to spill r5-r11 to reserved stack
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/* Use post-increment mode for stm to spill r5-r11 to reserved stack
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* frame. Don't update sp.
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* frame. Don't update sp.
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*/
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*/
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stmea sp, {r5-r11}
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stmea sp, {r5-r11}
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@ -236,7 +236,7 @@ non_congruent:
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movcs r3, r3, lsr #8
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movcs r3, r3, lsr #8
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cmp r2, #4
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cmp r2, #4
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blo partial_word_tail
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blo .Lpartial_word_tail
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/* Align destination to 32 bytes (cache line boundary) */
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/* Align destination to 32 bytes (cache line boundary) */
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1: tst r0, #0x1c
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1: tst r0, #0x1c
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@ -248,11 +248,11 @@ non_congruent:
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str r4, [r0], #4
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str r4, [r0], #4
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cmp r2, #4
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cmp r2, #4
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bhs 1b
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bhs 1b
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blo partial_word_tail
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blo .Lpartial_word_tail
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/* copy 32 bytes at a time */
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/* copy 32 bytes at a time */
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2: subs r2, r2, #32
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2: subs r2, r2, #32
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blo less_than_thirtytwo
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blo .Lless_than_thirtytwo
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/* Use immediate mode for the shifts, because there is an extra cycle
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/* Use immediate mode for the shifts, because there is an extra cycle
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* for register shifts, which could account for up to 50% of
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* for register shifts, which could account for up to 50% of
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@ -260,11 +260,11 @@ non_congruent:
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*/
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*/
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cmp r12, #24
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cmp r12, #24
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beq loop24
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beq .Lloop24
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cmp r12, #8
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cmp r12, #8
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beq loop8
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beq .Lloop8
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loop16:
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.Lloop16:
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ldr r12, [r1], #4
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ldr r12, [r1], #4
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1: mov r4, r12
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1: mov r4, r12
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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@ -289,9 +289,9 @@ loop16:
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stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
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stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
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mov r3, r11, lsr #16
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mov r3, r11, lsr #16
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bhs 1b
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bhs 1b
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b less_than_thirtytwo
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b .Lless_than_thirtytwo
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loop8:
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.Lloop8:
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ldr r12, [r1], #4
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ldr r12, [r1], #4
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1: mov r4, r12
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1: mov r4, r12
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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@ -316,9 +316,9 @@ loop8:
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stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
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stmia r0!, {r3,r4,r5,r6, r7,r8,r9,r10}
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mov r3, r11, lsr #8
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mov r3, r11, lsr #8
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bhs 1b
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bhs 1b
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b less_than_thirtytwo
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b .Lless_than_thirtytwo
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loop24:
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.Lloop24:
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ldr r12, [r1], #4
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ldr r12, [r1], #4
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1: mov r4, r12
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1: mov r4, r12
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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ldmia r1!, { r5,r6,r7, r8,r9,r10,r11}
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@ -345,12 +345,12 @@ loop24:
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bhs 1b
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bhs 1b
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less_than_thirtytwo:
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.Lless_than_thirtytwo:
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/* copy the last 0 to 31 bytes of the source */
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/* copy the last 0 to 31 bytes of the source */
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rsb r12, lr, #32 /* we corrupted r12, recompute it */
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rsb r12, lr, #32 /* we corrupted r12, recompute it */
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add r2, r2, #32
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add r2, r2, #32
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cmp r2, #4
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cmp r2, #4
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blo partial_word_tail
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blo .Lpartial_word_tail
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1: ldr r5, [r1], #4
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1: ldr r5, [r1], #4
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sub r2, r2, #4
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sub r2, r2, #4
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@ -360,7 +360,7 @@ less_than_thirtytwo:
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cmp r2, #4
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cmp r2, #4
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bhs 1b
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bhs 1b
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partial_word_tail:
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.Lpartial_word_tail:
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/* we have a partial word in the input buffer */
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/* we have a partial word in the input buffer */
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movs r5, lr, lsl #(31-3)
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movs r5, lr, lsl #(31-3)
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strmib r3, [r0], #1
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strmib r3, [r0], #1
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@ -372,7 +372,7 @@ partial_word_tail:
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/* Refill spilled registers from the stack. Don't update sp. */
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/* Refill spilled registers from the stack. Don't update sp. */
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ldmfd sp, {r5-r11}
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ldmfd sp, {r5-r11}
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copy_last_3_and_return:
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.Lcopy_last_3_and_return:
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movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
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movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
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ldrmib r2, [r1], #1
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ldrmib r2, [r1], #1
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ldrcsb r3, [r1], #1
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ldrcsb r3, [r1], #1
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@ -385,9 +385,15 @@ copy_last_3_and_return:
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add sp, sp, #28
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add sp, sp, #28
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ldmfd sp!, {r0, r4, lr}
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ldmfd sp!, {r0, r4, lr}
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bx lr
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bx lr
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END(memcpy)
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// Only reached when the __memcpy_chk check fails.
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// Only reached when the __memcpy_chk check fails.
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fortify_check_failed:
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ENTRY_PRIVATE(__memcpy_chk_fail)
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// Preserve lr for backtrace.
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push {lr}
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.cfi_def_cfa_offset 4
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.cfi_rel_offset lr, 0
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ldr r0, error_message
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ldr r0, error_message
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ldr r1, error_code
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ldr r1, error_code
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1:
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1:
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@ -397,7 +403,7 @@ error_code:
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.word BIONIC_EVENT_MEMCPY_BUFFER_OVERFLOW
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.word BIONIC_EVENT_MEMCPY_BUFFER_OVERFLOW
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error_message:
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error_message:
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.word error_string-(1b+8)
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.word error_string-(1b+8)
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END(memcpy)
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END(__memcpy_chk_fail)
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.data
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.data
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error_string:
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error_string:
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