From 89d61243f2f05748c0198b3c0e4766c2df2f4434 Mon Sep 17 00:00:00 2001
From: Elliott Hughes <enh@google.com>
Date: Mon, 9 Jun 2014 14:33:39 -0700
Subject: [PATCH] Move mips fenv implementation details into fenv.c.
Change-Id: I2415e4808e40c2981d016c01969ba14ea22bf82e
---
libm/include/mips/machine/fenv.h | 7 -------
libm/mips/fenv.c | 28 +++++++++++++++++-----------
2 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/libm/include/mips/machine/fenv.h b/libm/include/mips/machine/fenv.h
index 37f0f9c0b..689e1cb3f 100644
--- a/libm/include/mips/machine/fenv.h
+++ b/libm/include/mips/machine/fenv.h
@@ -87,19 +87,12 @@ typedef __uint32_t fexcept_t;
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
-#define _FCSR_CAUSE_SHIFT 10
-#define _ENABLE_SHIFT 5
-#define _FCSR_ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT)
-
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_TOWARDZERO 0x0001
#define FE_UPWARD 0x0002
#define FE_DOWNWARD 0x0003
-#define _FCSR_RMODE_SHIFT 0
-#define _FCSR_RMASK 0x3
-
__END_DECLS
#endif /* !_MIPS_FENV_H_ */
diff --git a/libm/mips/fenv.c b/libm/mips/fenv.c
index 893bc3009..aacd52630 100644
--- a/libm/mips/fenv.c
+++ b/libm/mips/fenv.c
@@ -28,6 +28,12 @@
#include <fenv.h>
+#define FCSR_CAUSE_SHIFT 10
+#define FCSR_ENABLE_SHIFT 5
+#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
+
+#define FCSR_RMASK 0x3
+
/*
* Hopefully the system ID byte is immutable, so it's valid to use
* this as a default environment.
@@ -55,7 +61,7 @@ int feclearexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
__excepts &= FE_ALL_EXCEPT;
- __fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT));
+ __fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
fesetenv(&__fcsr);
return 0;
}
@@ -84,7 +90,7 @@ int feraiseexcept(int __excepts) {
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
/* Cause bit needs to be set as well for generating the exception*/
- __fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT);
+ __fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
fesetenv(&__fcsr);
return 0;
}
@@ -98,14 +104,14 @@ int fetestexcept(int __excepts) {
int fegetround(void) {
fenv_t _fcsr;
fegetenv(&_fcsr);
- return (_fcsr & _FCSR_RMASK);
+ return (_fcsr & FCSR_RMASK);
}
int fesetround(int __round) {
fenv_t _fcsr;
fegetenv(&_fcsr);
- _fcsr &= ~_FCSR_RMASK;
- _fcsr |= (__round & _FCSR_RMASK ) ;
+ _fcsr &= ~FCSR_RMASK;
+ _fcsr |= (__round & FCSR_RMASK);
fesetenv(&_fcsr);
return 0;
}
@@ -114,7 +120,7 @@ int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
- __env &= ~(FE_ALL_EXCEPT | _FCSR_ENABLE_MASK);
+ __env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
@@ -130,21 +136,21 @@ int feupdateenv(const fenv_t* __envp) {
int feenableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
- __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT;
+ __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
fesetenv(&__new_fcsr);
- return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
+ return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fedisableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
- __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT);
+ __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
fesetenv(&__new_fcsr);
- return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
+ return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fegetexcept(void) {
fenv_t __fcsr;
fegetenv(&__fcsr);
- return ((__fcsr & _FCSR_ENABLE_MASK) >> _ENABLE_SHIFT);
+ return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
}