[MIPS] Clean Kernel headers are generated by running

libc/kernel/tools/update_all.py script. This patch ignores
any changes to libc/kernel directory not related to MIPS
architecture.

Change-Id: I2c9e461dccb7c33eb4420be2db1a562f45137c8d
Signed-off-by: Raghu Gandham <raghu@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
This commit is contained in:
Raghu Gandham
2012-03-27 11:37:17 -07:00
parent 56731351de
commit 82fa43febc
160 changed files with 18664 additions and 5 deletions

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@@ -0,0 +1,174 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ASM_SN_SN0_ADDRS_H
#define _ASM_SN_SN0_ADDRS_H
#define NODE_SIZE_BITS 32
#define BWIN_SIZE_BITS 29
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NASID_BITMASK (0xffLL)
#define NASID_BITS 8
#define NASID_SHFT 32
#define NASID_META_BITS 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NASID_LOCAL_BITS 4
#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT)
#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> NASID_SHFT) & NASID_BITMASK)
#ifndef __ASSEMBLY__
#define NODE_SWIN_BASE(nasid, widget) ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) : RAW_NODE_SWIN_BASE(nasid, widget))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#else
#define NODE_SWIN_BASE(nasid, widget) (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
#endif
#define BWIN_INDEX_BITS 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS)
#define BWIN_SIZEMASK (BWIN_SIZE - 1)
#define BWIN_WIDGET_MASK 0x7
#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK)
#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK)
#define NODE_BWIN_ADDR(nasid, addr) (((addr) >= NODE_BWIN_BASE0(nasid)) && ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + BWIN_SIZE)))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define CALIAS_BASE CAC_BASE
#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid)))
#define SABLE_LOG_TRIGGER(_map)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#ifndef __ASSEMBLY__
#define KERN_NMI_ADDR(nasid, slice) TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + (IP27_NMI_KREGS_CPU_SIZE * (slice)))
#endif
#ifdef PROM
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MISC_PROM_BASE PHYS_TO_K0(0x01300000)
#define MISC_PROM_SIZE 0x200000
#define DIAG_BASE PHYS_TO_K0(0x01500000)
#define DIAG_SIZE 0x300000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define ROUTE_BASE PHYS_TO_K0(0x01800000)
#define ROUTE_SIZE 0x200000
#define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000)
#define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_CORP_MAX 32
#define IP27PROM_CORP PHYS_TO_K0(0x01800000)
#define IP27PROM_CORP_SIZE 0x10000
#define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_CORP_STKSIZE 0x2000
#define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000)
#define IP27PROM_DECOMP_SIZE 0xfff00
#define IP27PROM_BASE PHYS_TO_K0(0x01a00000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000)
#define IP27PROM_SIZE_MAX 0x100000
#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000)
#define IP27PROM_PCFG_SIZE 0xd0000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000)
#define IP27PROM_ERRDMP_SIZE 0xf000
#define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000)
#define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_CONSOLE_SIZE 0x200
#define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200)
#define IP27PROM_NETUART_SIZE 0x100
#define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_UNUSED1_SIZE 0x500
#define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800)
#define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00)
#define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000)
#define IP27PROM_STACK_SHFT 16
#define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT)
#define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define SLAVESTACK_BASE PHYS_TO_K0(0x01580000)
#define SLAVESTACK_SIZE 0x40000
#define ENETBUFS_BASE PHYS_TO_K0(0x01f80000)
#define ENETBUFS_SIZE 0x20000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IO6PROM_BASE PHYS_TO_K0(0x01c00000)
#define IO6PROM_SIZE 0x400000
#define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000)
#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IO6DPROM_SIZE 0x200000
#define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000)
#define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000)
#define IP27PROM_INT_LAUNCH 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_INT_NETUART 12
#endif
#define IP27PROM_ELSC_SHFT 10
#define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define FREEMEM_BASE PHYS_TO_K0(0x2000000)
#define IO6PROM_STACK_SHFT 14
#define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT)
#define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008)
#define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010)
#define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018)
#define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028)
#define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030)
#define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038)
#define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048)
#define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0)
#define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0)
#define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define KL_I2C_REG MD_UREG0_0
#ifndef __ASSEMBLY__
#ifdef HUB_ERR_STS_WAR
#define CACHE_ERR_EFRAME 0x480
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#else
#define CACHE_ERR_EFRAME 0x400
#endif
#define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define CACHE_ERR_SP_PTR (0x1000 - 32)
#define CACHE_ERR_IBASE_PTR (0x1000 - 40)
#define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16)
#define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif
#define _ARCSPROM
#ifdef HUB_ERR_STS_WAR
#define ERR_STS_WAR_REGISTER IIO_IIBUSERR
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR)
#define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR)
#define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100)
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif

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/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ASM_SGI_SN_SN0_HUBIO_H
#define _ASM_SGI_SN_SN0_HUBIO_H
#define IIO_WIDGET IIO_WID
#define IIO_WIDGET_STAT IIO_WSTAT
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_WIDGET_CTRL IIO_WCR
#define IIO_WIDGET_TOUT IIO_WRTO
#define IIO_WIDGET_FLUSH IIO_WTFR
#define IIO_PROTECT IIO_ILAPR
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_PROTECT_OVRRD IIO_ILAPO
#define IIO_OUTWIDGET_ACCESS IIO_IOWA
#define IIO_INWIDGET_ACCESS IIO_IIWA
#define IIO_INDEV_ERR_MASK IIO_IIDEM
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_LLP_CSR IIO_ILCSR
#define IIO_LLP_LOG IIO_ILLR
#define IIO_XTALKCC_TOUT IIO_IXCC
#define IIO_XTALKTT_TOUT IIO_IXTT
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IO_ERR_CLR IIO_IECLR
#define IIO_BTE_CRB_CNT IIO_IBCN
#define IIO_LLP_CSR_IS_UP 0x00002000
#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_LLP_CSR_LLP_STAT_SHFT 12
#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull
#define IIO_BTE_STAT_0 IIO_IBLS_0
#define IIO_BTE_SRC_0 IIO_IBSA_0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_BTE_DEST_0 IIO_IBDA_0
#define IIO_BTE_CTRL_0 IIO_IBCT_0
#define IIO_BTE_NOTIFY_0 IIO_IBNA_0
#define IIO_BTE_INT_0 IIO_IBIA_0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_BTE_OFF_0 0
#define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0
#define BTEOFF_STAT 0
#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0)
#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0)
#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0)
#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_BASE 0x400000
#define IIO_BASE_BTE0 0x410000
#define IIO_BASE_BTE1 0x420000
#define IIO_BASE_PERF 0x430000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_PERF_CNT 0x430008
#define IO_PERF_SETS 32
#define IIO_WID 0x400000
#define IIO_WSTAT 0x400008
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_WCR 0x400020
#define IIO_WSTAT_ECRAZY (1ULL << 32)
#define IIO_WSTAT_TXRETRY (1ULL << 9)
#define IIO_WSTAT_TXRETRY_MASK (0x7F)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_WSTAT_TXRETRY_SHFT (16)
#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & IIO_WSTAT_TXRETRY_MASK)
#define IIO_ILAPR 0x400100
#define IIO_ILAPO 0x400108
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IOWA 0x400110
#define IIO_IIWA 0x400118
#define IIO_IIDEM 0x400120
#define IIO_ILCSR 0x400128
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ILLR 0x400130
#define IIO_IIDSR 0x400138
#define IIO_IIBUSERR 0x1400208
#define IIO_IIDSR_SENT_SHIFT 28
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IIDSR_SENT_MASK 0x10000000
#define IIO_IIDSR_ENB_SHIFT 24
#define IIO_IIDSR_ENB_MASK 0x01000000
#define IIO_IIDSR_NODE_SHIFT 8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IIDSR_NODE_MASK 0x0000ff00
#define IIO_IIDSR_LVL_SHIFT 0
#define IIO_IIDSR_LVL_MASK 0x0000003f
#define IIO_IGFX_0 0x400140
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IGFX_1 0x400148
#define IIO_IGFX_W_NUM_BITS 4
#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1)
#define IIO_IGFX_W_NUM_SHIFT 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IGFX_N_NUM_BITS 9
#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1)
#define IIO_IGFX_N_NUM_SHIFT 4
#define IIO_IGFX_P_NUM_BITS 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1)
#define IIO_IGFX_P_NUM_SHIFT 16
#define IIO_IGFX_VLD_BITS 1
#define IIO_IGFX_VLD_MASK ((1<<IIO_IGFX_VLD_BITS)-1)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IGFX_VLD_SHIFT 20
#define IIO_IGFX_INIT(widget, node, cpu, valid) ( (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT) | (((valid) & IIO_IGFX_VLD_MASK) << IIO_IGFX_VLD_SHIFT) )
#define IIO_SCRATCH_REG0 0x400150
#define IIO_SCRATCH_REG1 0x400158
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_SCRATCH_MASK 0x0000000f00f11fff
#define IIO_SCRATCH_BIT0_0 0x0000000800000000
#define IIO_SCRATCH_BIT0_1 0x0000000400000000
#define IIO_SCRATCH_BIT0_2 0x0000000200000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_SCRATCH_BIT0_3 0x0000000100000000
#define IIO_SCRATCH_BIT0_4 0x0000000000800000
#define IIO_SCRATCH_BIT0_5 0x0000000000400000
#define IIO_SCRATCH_BIT0_6 0x0000000000200000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_SCRATCH_BIT0_7 0x0000000000100000
#define IIO_SCRATCH_BIT0_8 0x0000000000010000
#define IIO_SCRATCH_BIT0_9 0x0000000000001000
#define IIO_SCRATCH_BIT0_R 0x0000000000000fff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_NUM_ITTES 7
#define HUB_NUM_BIG_WINDOW IIO_NUM_ITTES - 1
#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW
#define ILCSR_WARM_RESET 0x100
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#ifndef __ASSEMBLY__
typedef union hubii_wid_u {
u64 wid_reg_value;
struct {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 wid_rsvd: 32,
wid_rev_num: 4,
wid_part_num: 16,
wid_mfg_num: 11,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
wid_rsvd1: 1;
} wid_fields_s;
} hubii_wid_t;
typedef union hubii_wcr_u {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 wcr_reg_value;
struct {
u64 wcr_rsvd: 41,
wcr_e_thresh: 5,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
wcr_dir_con: 1,
wcr_f_bad_pkt: 1,
wcr_xbar_crd: 3,
wcr_rsvd1: 8,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
wcr_tag_mode: 1,
wcr_widget_id: 4;
} wcr_fields_s;
} hubii_wcr_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define iwcr_dir_con wcr_fields_s.wcr_dir_con
typedef union hubii_wstat_u {
u64 reg_value;
struct {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 rsvd1: 31,
crazy: 1,
rsvd2: 8,
llp_tx_cnt: 8,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd3: 6,
tx_max_rtry: 1,
rsvd4: 2,
xt_tail_to: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
xt_crd_to: 1,
pending: 4;
} wstat_fields_s;
} hubii_wstat_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union hubii_ilcsr_u {
u64 icsr_reg_value;
struct {
u64 icsr_rsvd: 22,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
icsr_max_burst: 10,
icsr_rsvd4: 6,
icsr_max_retry: 10,
icsr_rsvd3: 2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
icsr_lnk_stat: 2,
icsr_bm8: 1,
icsr_llp_en: 1,
icsr_rsvd2: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
icsr_wrm_reset: 1,
icsr_rsvd1: 2,
icsr_null_to: 6;
} icsr_fields_s;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} hubii_ilcsr_t;
typedef union hubii_iowa_u {
u64 iowa_reg_value;
struct {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 iowa_rsvd: 48,
iowa_wxoac: 8,
iowa_rsvd1: 7,
iowa_w0oac: 1;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} iowa_fields_s;
} hubii_iowa_t;
typedef union hubii_iiwa_u {
u64 iiwa_reg_value;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct {
u64 iiwa_rsvd: 48,
iiwa_wxiac: 8,
iiwa_rsvd1: 7,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
iiwa_w0iac: 1;
} iiwa_fields_s;
} hubii_iiwa_t;
typedef union hubii_illr_u {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 illr_reg_value;
struct {
u64 illr_rsvd: 32,
illr_cb_cnt: 16,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
illr_sn_cnt: 16;
} illr_fields_s;
} hubii_illr_t;
typedef union io_perf_sel {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 perf_sel_reg;
struct {
u64 perf_rsvd : 48,
perf_icct : 8,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
perf_ippr1 : 4,
perf_ippr0 : 4;
} perf_sel_bits;
} io_perf_sel_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union io_perf_cnt {
u64 perf_cnt;
struct {
u64 perf_rsvd1 : 32,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
perf_rsvd2 : 12,
perf_cnt : 20;
} perf_cnt_bits;
} io_perf_cnt_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif
#define LNK_STAT_WORKING 0x2
#define IIO_LLP_CB_MAX 0xffff
#define IIO_LLP_SN_MAX 0xffff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_NUM_IPRBS (9)
#define IIO_IOPRB_0 0x400198
#define IIO_IOPRB_8 0x4001a0
#define IIO_IOPRB_9 0x4001a8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IOPRB_A 0x4001b0
#define IIO_IOPRB_B 0x4001b8
#define IIO_IOPRB_C 0x4001c0
#define IIO_IOPRB_D 0x4001c8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IOPRB_E 0x4001d0
#define IIO_IOPRB_F 0x4001d8
#define IIO_IXCC 0x4001e0
#define IIO_IXTCC IIO_IXCC
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IMEM 0x4001e8
#define IIO_IXTT 0x4001f0
#define IIO_IECLR 0x4001f8
#define IIO_IBCN 0x400200
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IMEM_W0ESD 0x1
#define IIO_IMEM_B0ESD (1 << 4)
#define IIO_IMEM_B1ESD (1 << 8)
#define IIO_IPCA 0x400300
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_NUM_PRTES 8
#define IIO_PRTE_0 0x400308
#define IIO_PRTE(_x) (IIO_PRTE_0 + (8 * (_x)))
#define IIO_WIDPRTE(x) IIO_PRTE(((x) - 8))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IPDR 0x400388
#define IIO_ICDR 0x400390
#define IIO_IFDR 0x400398
#define IIO_IIAP 0x4003a0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IMMR IIO_IIAP
#define IIO_ICMR 0x4003a8
#define IIO_ICCR 0x4003b0
#define IIO_ICTO 0x4003b8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICTP 0x4003c0
#define IIO_ICMR_PC_VLD_SHFT 36
#define IIO_ICMR_PC_VLD_MASK (0x7fffUL << IIO_ICMR_PC_VLD_SHFT)
#define IIO_ICMR_CRB_VLD_SHFT 20
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT)
#define IIO_ICMR_FC_CNT_SHFT 16
#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT)
#define IIO_ICMR_C_CNT_SHFT 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT)
#define IIO_ICMR_P_CNT_SHFT 0
#define IIO_ICMR_P_CNT_MASK (0xf << IIO_ICMR_P_CNT_SHFT)
#define IIO_ICMR_PRECISE (1UL << 52)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICMR_CLR_RPPD (1UL << 13)
#define IIO_ICMR_CLR_RQPD (1UL << 12)
#define IIO_IPDR_PND (1 << 4)
#define IIO_ICDR_PND (1 << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICCR_PENDING (0x10000)
#define IIO_ICCR_CMD_MASK (0xFF)
#define IIO_ICCR_CMD_SHFT (7)
#define IIO_ICCR_CMD_NOP (0x0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICCR_CMD_WAKE (0x100)
#define IIO_ICCR_CMD_TIMEOUT (0x200)
#define IIO_ICCR_CMD_EJECT (0x400)
#define IIO_ICCR_CMD_FLUSH (0x800)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_NUM_CRBS 15
#define IIO_NUM_NORMAL_CRBS 12
#define IIO_NUM_PC_CRBS 4
#define IIO_ICRB_OFFSET 8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_0 0x400400
#define IIO_ICRB_A(_x) (IIO_ICRB_0 + (4 * IIO_ICRB_OFFSET * (_x)))
#define IIO_ICRB_B(_x) (IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET)
#define IIO_ICRB_C(_x) (IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_D(_x) (IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET)
#ifndef __ASSEMBLY__
typedef union icrba_u {
u64 reg_value;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct {
u64 resvd: 6,
stall_bte0: 1,
stall_bte1: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
error: 1,
ecode: 3,
lnetuce: 1,
mark: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
xerr: 1,
sidn: 4,
tnum: 5,
addr: 38,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
valid: 1,
iow: 1;
} icrba_fields_s;
} icrba_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union h1_icrba_u {
u64 reg_value;
struct {
u64 resvd: 6,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
unused: 1,
error: 1,
ecode: 4,
lnetuce: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mark: 1,
xerr: 1,
sidn: 4,
tnum: 5,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
addr: 38,
valid: 1,
iow: 1;
} h1_icrba_fields_s;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} h1_icrba_t;
#define ICRBN_A_CERR_SHFT 54
#define ICRBN_A_ERR_MASK 0x3ff
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_ADDR_SHFT 2
#define IIO_ICRB_ECODE_DERR 0
#define IIO_ICRB_ECODE_PERR 1
#define IIO_ICRB_ECODE_WERR 2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_ECODE_AERR 3
#define IIO_ICRB_ECODE_PWERR 4
#define IIO_ICRB_ECODE_PRERR 5
#define IIO_ICRB_ECODE_TOUT 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_ECODE_XTERR 7
#ifndef __ASSEMBLY__
typedef union icrbb_u {
u64 reg_value;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct {
u64 rsvd1: 5,
btenum: 1,
cohtrans: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
xtsize: 2,
srcnode: 9,
srcinit: 2,
useold: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
imsgtype: 2,
imsg: 8,
initator: 3,
reqtype: 5,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd2: 7,
ackcnt: 11,
resp: 1,
ack: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
hold: 1,
wb_pend:1,
intvn: 1,
stall_ib: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
stall_intr: 1;
} icrbb_field_s;
} icrbb_t;
typedef union h1_icrbb_u {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 reg_value;
struct {
u64 rsvd1: 5,
btenum: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
cohtrans: 1,
xtsize: 2,
srcnode: 9,
srcinit: 2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
useold: 1,
imsgtype: 2,
imsg: 8,
initator: 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd2: 1,
pcache: 1,
reqtype: 5,
stl_ib: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
stl_intr: 1,
stl_bte0: 1,
stl_bte1: 1,
intrvn: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
ackcnt: 11,
resp: 1,
ack: 1,
hold: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
wb_pend:1,
sleep: 1,
pnd_reply: 1,
pnd_req: 1;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} h1_icrbb_field_s;
} h1_icrbb_t;
#define b_imsgtype icrbb_field_s.imsgtype
#define b_btenum icrbb_field_s.btenum
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define b_cohtrans icrbb_field_s.cohtrans
#define b_xtsize icrbb_field_s.xtsize
#define b_srcnode icrbb_field_s.srcnode
#define b_srcinit icrbb_field_s.srcinit
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define b_imsgtype icrbb_field_s.imsgtype
#define b_imsg icrbb_field_s.imsg
#define b_initiator icrbb_field_s.initiator
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_XTSIZE_DW 0
#define IIO_ICRB_XTSIZE_32 1
#define IIO_ICRB_XTSIZE_128 2
#define IIO_ICRB_PROC0 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_PROC1 1
#define IIO_ICRB_GB_REQ 2
#define IIO_ICRB_IO_REQ 3
#define IIO_ICRB_IMSGT_XTALK 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_IMSGT_BTE 1
#define IIO_ICRB_IMSGT_SN0NET 2
#define IIO_ICRB_IMSGT_CRB 3
#define IIO_ICRB_INIT_XTALK 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_INIT_BTE0 0x1
#define IIO_ICRB_INIT_SN0NET 0x2
#define IIO_ICRB_INIT_CRB 0x3
#define IIO_ICRB_INIT_BTE1 0x5
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_REQ_DWRD 0
#define IIO_ICRB_REQ_QCLRD 1
#define IIO_ICRB_REQ_BLKRD 2
#define IIO_ICRB_REQ_RSHU 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_REQ_REXU 7
#define IIO_ICRB_REQ_RDEX 8
#define IIO_ICRB_REQ_WINC 9
#define IIO_ICRB_REQ_BWINV 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_REQ_PIORD 11
#define IIO_ICRB_REQ_PIOWR 12
#define IIO_ICRB_REQ_PRDM 13
#define IIO_ICRB_REQ_PWRM 14
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_ICRB_REQ_PTPWR 15
#define IIO_ICRB_REQ_WB 16
#define IIO_ICRB_REQ_DEX 17
#ifndef __ASSEMBLY__
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union icrbc_s {
u64 reg_value;
struct {
u64 rsvd: 6,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sleep: 1,
pricnt: 4,
pripsc: 4,
bteop: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
push_be: 34,
suppl: 11,
barrop: 1,
doresp: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
gbr: 1;
} icrbc_field_s;
} icrbc_t;
#define c_pricnt icrbc_field_s.pricnt
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define c_pripsc icrbc_field_s.pripsc
#define c_bteop icrbc_field_s.bteop
#define c_bteaddr icrbc_field_s.push_be
#define c_benable icrbc_field_s.push_be
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define c_suppl icrbc_field_s.suppl
#define c_barrop icrbc_field_s.barrop
#define c_doresp icrbc_field_s.doresp
#define c_gbr icrbc_field_s.gbr
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif
#ifndef __ASSEMBLY__
typedef union icrbd_s {
u64 reg_value;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct {
u64 rsvd: 38,
toutvld: 1,
ctxtvld: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd2: 1,
context: 15,
timeout: 8;
} icrbd_field_s;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} icrbd_t;
#define icrbd_toutvld icrbd_field_s.toutvld
#define icrbd_ctxtvld icrbd_field_s.ctxtvld
#define icrbd_context icrbd_field_s.context
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union hubii_ifdr_u {
u64 hi_ifdr_value;
struct {
u64 ifdr_rsvd: 49,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
ifdr_maxrp: 7,
ifdr_rsvd1: 1,
ifdr_maxrq: 7;
} hi_ifdr_fields;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} hubii_ifdr_t;
#endif
#define IIO_IBLS_0 0x410000
#define IIO_IBSA_0 0x410008
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IBDA_0 0x410010
#define IIO_IBCT_0 0x410018
#define IIO_IBNA_0 0x410020
#define IIO_IBNR_0 IIO_IBNA_0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IBIA_0 0x410028
#define IIO_IBLS_1 0x420000
#define IIO_IBSA_1 0x420008
#define IIO_IBDA_1 0x420010
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IBCT_1 0x420018
#define IIO_IBNA_1 0x420020
#define IIO_IBNR_1 IIO_IBNA_1
#define IIO_IBIA_1 0x420028
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_IPCR 0x430000
#define IIO_IPPR 0x430008
#define IECLR_BTE1 (1 << 18)
#define IECLR_BTE0 (1 << 17)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IECLR_CRAZY (1 << 16)
#define IECLR_PRB_F (1 << 15)
#define IECLR_PRB_E (1 << 14)
#define IECLR_PRB_D (1 << 13)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IECLR_PRB_C (1 << 12)
#define IECLR_PRB_B (1 << 11)
#define IECLR_PRB_A (1 << 10)
#define IECLR_PRB_9 (1 << 9)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IECLR_PRB_8 (1 << 8)
#define IECLR_PRB_0 (1 << 0)
#ifndef __ASSEMBLY__
typedef union iprte_a {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 entry;
struct {
u64 rsvd1 : 7,
valid : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd2 : 1,
srcnode : 9,
initiator : 2,
rsvd3 : 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
addr : 38,
rsvd4 : 3;
} iprte_fields;
} iprte_a_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define iprte_valid iprte_fields.valid
#define iprte_timeout iprte_fields.timeout
#define iprte_srcnode iprte_fields.srcnode
#define iprte_init iprte_fields.initiator
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define iprte_addr iprte_fields.addr
#endif
#define IPRTE_ADDRSHFT 3
#ifndef __ASSEMBLY__
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union iprb_u {
u64 reg_value;
struct {
u64 rsvd1: 15,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
error: 1,
ovflow: 5,
fire_and_forget: 1,
mode: 2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd2: 2,
bnakctr: 14,
rsvd3: 2,
anakctr: 14,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
xtalkctr: 8;
} iprb_fields_s;
} iprb_t;
#define iprb_regval reg_value
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define iprb_error iprb_fields_s.error
#define iprb_ovflow iprb_fields_s.ovflow
#define iprb_ff iprb_fields_s.fire_and_forget
#define iprb_mode iprb_fields_s.mode
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define iprb_bnakctr iprb_fields_s.bnakctr
#define iprb_anakctr iprb_fields_s.anakctr
#define iprb_xtalkctr iprb_fields_s.xtalkctr
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IPRB_MODE_NORMAL (0)
#define IPRB_MODE_COLLECT_A (1)
#define IPRB_MODE_SERVICE_A (2)
#define IPRB_MODE_SERVICE_B (3)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#ifndef __ASSEMBLY__
typedef union icrbp_a {
u64 ip_reg;
struct {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 error: 1,
ln_uce: 1,
ln_ae: 1,
ln_werr:1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
ln_aerr:1,
ln_perr:1,
timeout:1,
l_bdpkt:1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
c_bdpkt:1,
c_err: 1,
rsvd1: 12,
valid: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sidn: 4,
tnum: 5,
bo: 1,
resprqd:1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
gbr: 1,
size: 2,
excl: 4,
stall: 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
intvn: 1,
resp: 1,
ack: 1,
hold: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
wb: 1,
ack_cnt:11,
tscaler:4;
} ip_fmt;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} icrbp_a_t;
#endif
#define ICRBP_A_CERR_SHFT 54
#define ICRBP_A_ERR_MASK 0x3ff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#ifndef __ASSEMBLY__
typedef union hubii_idsr {
u64 iin_reg;
struct {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 rsvd1 : 35,
isent : 1,
rsvd2 : 3,
ienable: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd : 7,
node : 9,
rsvd4 : 1,
level : 7;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} iin_fmt;
} hubii_idsr_t;
#endif
#define IBLS_BUSY (0x1 << 20)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IBLS_ERROR_SHFT 16
#define IBLS_ERROR (0x1 << IBLS_ERROR_SHFT)
#define IBLS_LENGTH_MASK 0xffff
#define IBCT_POISON (0x1 << 8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IBCT_NOTIFY (0x1 << 4)
#define IBCT_ZFIL_MODE (0x1 << 0)
#define IBIA_LEVEL_SHFT 16
#define IBIA_LEVEL_MASK (0x7f << IBIA_LEVEL_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IBIA_NODE_ID_SHFT 0
#define IBIA_NODE_ID_MASK (0x1ff)
#define HUB_NUM_WIDGET 9
#define HUB_WIDGET_ID_MIN 0x8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define HUB_WIDGET_ID_MAX 0xf
#define HUB_WIDGET_PART_NUM 0xc101
#define MAX_HUBS_PER_XBOW 2
#define IIO_WCR_WID_GET(nasid) (REMOTE_HUB_L(nasid, III_WCR) & 0xf)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32)
#define HUBII_XBOW_CREDIT 3
#define HUBII_XBOW_REV2_CREDIT 4
#endif
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */

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@@ -0,0 +1,611 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ASM_SN_SN0_HUBMD_H
#define _ASM_SN_SN0_HUBMD_H
#define CACHE_SLINE_SIZE 128
#define MAX_REGIONS 64
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PAGE_SIZE 4096
#define MD_PAGE_NUM_SHFT 12
#define MD_BASE 0x200000
#define MD_BASE_PERF 0x210000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_BASE_JUNK 0x220000
#define MD_IO_PROTECT 0x200000
#define MD_IO_PROT_OVRRD 0x200008
#define MD_HSPEC_PROTECT 0x200010
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MEMORY_CONFIG 0x200018
#define MD_REFRESH_CONTROL 0x200020
#define MD_FANDOP_CAC_STAT 0x200028
#define MD_MIG_DIFF_THRESH 0x200030
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_VALUE_THRESH 0x200038
#define MD_MIG_CANDIDATE 0x200040
#define MD_MIG_CANDIDATE_CLR 0x200048
#define MD_DIR_ERROR 0x200050
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_DIR_ERROR_CLR 0x200058
#define MD_PROTOCOL_ERROR 0x200060
#define MD_PROTOCOL_ERROR_CLR 0x200068
#define MD_MEM_ERROR 0x200070
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MEM_ERROR_CLR 0x200078
#define MD_MISC_ERROR 0x200080
#define MD_MISC_ERROR_CLR 0x200088
#define MD_MEM_DIMM_INIT 0x200090
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_DIR_DIMM_INIT 0x200098
#define MD_MOQ_SIZE 0x2000a0
#define MD_MLAN_CTL 0x2000a8
#define MD_PERF_SEL 0x210000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PERF_CNT0 0x210010
#define MD_PERF_CNT1 0x210018
#define MD_PERF_CNT2 0x210020
#define MD_PERF_CNT3 0x210028
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PERF_CNT4 0x210030
#define MD_PERF_CNT5 0x210038
#define MD_UREG0_0 0x220000
#define MD_UREG0_1 0x220008
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG0_2 0x220010
#define MD_UREG0_3 0x220018
#define MD_UREG0_4 0x220020
#define MD_UREG0_5 0x220028
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG0_6 0x220030
#define MD_UREG0_7 0x220038
#define MD_SLOTID_USTAT 0x220048
#define MD_LED0 0x220050
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_LED1 0x220058
#define MD_UREG1_0 0x220080
#define MD_UREG1_1 0x220088
#define MD_UREG1_2 0x220090
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG1_3 0x220098
#define MD_UREG1_4 0x2200a0
#define MD_UREG1_5 0x2200a8
#define MD_UREG1_6 0x2200b0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG1_7 0x2200b8
#define MD_UREG1_8 0x2200c0
#define MD_UREG1_9 0x2200c8
#define MD_UREG1_10 0x2200d0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG1_11 0x2200d8
#define MD_UREG1_12 0x2200e0
#define MD_UREG1_13 0x2200e8
#define MD_UREG1_14 0x2200f0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_UREG1_15 0x2200f8
#define MD_MEM_BANKS 8
#define MD_SIZE_EMPTY 0
#define MD_SIZE_8MB 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SIZE_16MB 2
#define MD_SIZE_32MB 3
#define MD_SIZE_64MB 4
#define MD_SIZE_128MB 5
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SIZE_256MB 6
#define MD_SIZE_512MB 7
#define MD_SIZE_1GB 8
#define MD_SIZE_2GB 9
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SIZE_4GB 10
#define MD_SIZE_BYTES(size) ((size) == 0 ? 0 : 0x400000L << (size))
#define MD_SIZE_MBYTES(size) ((size) == 0 ? 0 : 4 << (size))
#define MMC_FPROM_CYC_SHFT 49
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49)
#define MMC_FPROM_WR_SHFT 44
#define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44)
#define MMC_UCTLR_CYC_SHFT 39
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39)
#define MMC_UCTLR_WR_SHFT 34
#define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34)
#define MMC_DIMM0_SEL_SHFT 32
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32)
#define MMC_IO_PROT_EN_SHFT 31
#define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31)
#define MMC_IO_PROT (UINT64_CAST 1 << 31)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_ARB_MLSS_SHFT 30
#define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30)
#define MMC_ARB_MLSS (UINT64_CAST 1 << 30)
#define MMC_IGNORE_ECC_SHFT 29
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29)
#define MMC_IGNORE_ECC (UINT64_CAST 1 << 29)
#define MMC_DIR_PREMIUM_SHFT 28
#define MMC_DIR_PREMIUM_MASK (UINT64_CAST 1 << 28)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_DIR_PREMIUM (UINT64_CAST 1 << 28)
#define MMC_REPLY_GUAR_SHFT 24
#define MMC_REPLY_GUAR_MASK (UINT64_CAST 15 << 24)
#define MMC_BANK_SHFT(_b) ((_b) * 3)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMC_BANK_MASK(_b) (UINT64_CAST 7 << MMC_BANK_SHFT(_b))
#define MMC_BANK_ALL_MASK 0xffffff
#define MMC_RESET_DEFAULTS (UINT64_CAST 0x0f << MMC_FPROM_CYC_SHFT | UINT64_CAST 0x07 << MMC_FPROM_WR_SHFT | UINT64_CAST 0x1f << MMC_UCTLR_CYC_SHFT | UINT64_CAST 0x0f << MMC_UCTLR_WR_SHFT | MMC_IGNORE_ECC | MMC_DIR_PREMIUM | UINT64_CAST 0x0f << MMC_REPLY_GUAR_SHFT | MMC_BANK_ALL_MASK)
#define MRC_ENABLE_SHFT 63
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MRC_ENABLE_MASK (UINT64_CAST 1 << 63)
#define MRC_ENABLE (UINT64_CAST 1 << 63)
#define MRC_COUNTER_SHFT 12
#define MRC_COUNTER_MASK (UINT64_CAST 0xfff << 12)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MRC_CNT_THRESH_MASK 0xfff
#define MRC_RESET_DEFAULTS (UINT64_CAST 0x400)
#define MDI_SELECT_SHFT 32
#define MDI_SELECT_MASK (UINT64_CAST 0x0f << 32)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDI_DIMM_MODE_MASK (UINT64_CAST 0xfff)
#define MMS_RP_SIZE_SHFT 8
#define MMS_RP_SIZE_MASK (UINT64_CAST 0x3f << 8)
#define MMS_RQ_SIZE_SHFT 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMS_RQ_SIZE_MASK (UINT64_CAST 0x1f)
#define MMS_RESET_DEFAULTS (0x32 << 8 | 0x12)
#define MFC_VALID_SHFT 63
#define MFC_VALID_MASK (UINT64_CAST 1 << 63)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MFC_VALID (UINT64_CAST 1 << 63)
#define MFC_ADDR_SHFT 6
#define MFC_ADDR_MASK (UINT64_CAST 0x3ffffff)
#define MLAN_PHI1_SHFT 27
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MLAN_PHI1_MASK (UINT64_CAST 0x7f << 27)
#define MLAN_PHI0_SHFT 20
#define MLAN_PHI0_MASK (UINT64_CAST 0x7f << 27)
#define MLAN_PULSE_SHFT 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MLAN_PULSE_MASK (UINT64_CAST 0x3ff << 10)
#define MLAN_SAMPLE_SHFT 2
#define MLAN_SAMPLE_MASK (UINT64_CAST 0xff << 2)
#define MLAN_DONE_SHFT 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MLAN_DONE_MASK 2
#define MLAN_DONE (UINT64_CAST 0x02)
#define MLAN_RD_DATA (UINT64_CAST 0x01)
#define MLAN_RESET_DEFAULTS (UINT64_CAST 0x31 << MLAN_PHI1_SHFT | UINT64_CAST 0x31 << MLAN_PHI0_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_CORECLK_TST_SHFT 7
#define MSU_CORECLK_TST_MASK (UINT64_CAST 1 << 7)
#define MSU_CORECLK_TST (UINT64_CAST 1 << 7)
#define MSU_CORECLK_SHFT 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_CORECLK_MASK (UINT64_CAST 1 << 6)
#define MSU_CORECLK (UINT64_CAST 1 << 6)
#define MSU_NETSYNC_SHFT 5
#define MSU_NETSYNC_MASK (UINT64_CAST 1 << 5)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_NETSYNC (UINT64_CAST 1 << 5)
#define MSU_FPROMRDY_SHFT 4
#define MSU_FPROMRDY_MASK (UINT64_CAST 1 << 4)
#define MSU_FPROMRDY (UINT64_CAST 1 << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_I2CINTR_SHFT 3
#define MSU_I2CINTR_MASK (UINT64_CAST 1 << 3)
#define MSU_I2CINTR (UINT64_CAST 1 << 3)
#define MSU_SLOTID_MASK 0xff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_SN0_SLOTID_SHFT 0
#define MSU_SN0_SLOTID_MASK (UINT64_CAST 7)
#define MSU_SN00_SLOTID_SHFT 7
#define MSU_SN00_SLOTID_MASK (UINT64_CAST 0x80)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSU_PIMM_PSC_SHFT 4
#define MSU_PIMM_PSC_MASK (0xf << MSU_PIMM_PSC_SHFT)
#define MD_MIG_DIFF_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
#define MD_MIG_DIFF_THRES_VALID_SHFT 63
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_DIFF_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
#define MD_MIG_VALUE_THRES_VALID_MASK (UINT64_CAST 0x1 << 63)
#define MD_MIG_VALUE_THRES_VALID_SHFT 63
#define MD_MIG_VALUE_THRES_VALUE_MASK (UINT64_CAST 0xfffff)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_CANDIDATE_VALID_MASK (UINT64_CAST 0x1 << 63)
#define MD_MIG_CANDIDATE_VALID_SHFT 63
#define MD_MIG_CANDIDATE_TYPE_MASK (UINT64_CAST 0x1 << 30)
#define MD_MIG_CANDIDATE_TYPE_SHFT 30
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_CANDIDATE_OVERRUN_MASK (UINT64_CAST 0x1 << 29)
#define MD_MIG_CANDIDATE_OVERRUN_SHFT 29
#define MD_MIG_CANDIDATE_INITIATOR_MASK (UINT64_CAST 0x7ff << 18)
#define MD_MIG_CANDIDATE_INITIATOR_SHFT 18
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_CANDIDATE_NODEID_MASK (UINT64_CAST 0x1ff << 20)
#define MD_MIG_CANDIDATE_NODEID_SHFT 20
#define MD_MIG_CANDIDATE_ADDR_MASK (UINT64_CAST 0x3ffff)
#define MD_MIG_CANDIDATE_ADDR_SHFT 14
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_BANK_SHFT 29
#define MD_BANK_MASK (UINT64_CAST 7 << 29)
#define MD_BANK_SIZE (UINT64_CAST 1 << MD_BANK_SHFT)
#define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_DIR_SHARED (UINT64_CAST 0x0)
#define MD_DIR_POISONED (UINT64_CAST 0x1)
#define MD_DIR_EXCLUSIVE (UINT64_CAST 0x2)
#define MD_DIR_BUSY_SHARED (UINT64_CAST 0x3)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_DIR_BUSY_EXCL (UINT64_CAST 0x4)
#define MD_DIR_WAIT (UINT64_CAST 0x5)
#define MD_DIR_UNOWNED (UINT64_CAST 0x7)
#define MD_DIR_FORCE_ECC (UINT64_CAST 1 << 63)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_MASK 0xffffffffffff
#define MD_PDIR_ECC_SHFT 0
#define MD_PDIR_ECC_MASK 0x7f
#define MD_PDIR_PRIO_SHFT 8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_PRIO_MASK (0xf << 8)
#define MD_PDIR_AX_SHFT 7
#define MD_PDIR_AX_MASK (1 << 7)
#define MD_PDIR_AX (1 << 7)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_FINE_SHFT 12
#define MD_PDIR_FINE_MASK (1 << 12)
#define MD_PDIR_FINE (1 << 12)
#define MD_PDIR_OCT_SHFT 13
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_OCT_MASK (7 << 13)
#define MD_PDIR_STATE_SHFT 13
#define MD_PDIR_STATE_MASK (7 << 13)
#define MD_PDIR_ONECNT_SHFT 16
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_ONECNT_MASK (0x3f << 16)
#define MD_PDIR_PTR_SHFT 22
#define MD_PDIR_PTR_MASK (UINT64_CAST 0x7ff << 22)
#define MD_PDIR_VECMSB_SHFT 22
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_VECMSB_BITMASK 0x3ffffff
#define MD_PDIR_VECMSB_BITSHFT 27
#define MD_PDIR_VECMSB_MASK (UINT64_CAST MD_PDIR_VECMSB_BITMASK << 22)
#define MD_PDIR_CWOFF_SHFT 7
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_CWOFF_MASK (7 << 7)
#define MD_PDIR_VECLSB_SHFT 10
#define MD_PDIR_VECLSB_BITMASK (UINT64_CAST 0x3fffffffff)
#define MD_PDIR_VECLSB_BITSHFT 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PDIR_VECLSB_MASK (MD_PDIR_VECLSB_BITMASK << 10)
#define MD_PDIR_INIT_LO (MD_DIR_UNOWNED << MD_PDIR_STATE_SHFT | MD_PDIR_AX)
#define MD_PDIR_INIT_HI 0
#define MD_PDIR_INIT_PROT (MD_PROT_RW << MD_PPROT_IO_SHFT | MD_PROT_RW << MD_PPROT_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_MASK 0xffff
#define MD_SDIR_ECC_SHFT 0
#define MD_SDIR_ECC_MASK 0x1f
#define MD_SDIR_PRIO_SHFT 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_PRIO_MASK (1 << 6)
#define MD_SDIR_AX_SHFT 5
#define MD_SDIR_AX_MASK (1 << 5)
#define MD_SDIR_AX (1 << 5)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_STATE_SHFT 7
#define MD_SDIR_STATE_MASK (7 << 7)
#define MD_SDIR_PTR_SHFT 10
#define MD_SDIR_PTR_MASK (0x3f << 10)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_CWOFF_SHFT 5
#define MD_SDIR_CWOFF_MASK (7 << 5)
#define MD_SDIR_VECMSB_SHFT 11
#define MD_SDIR_VECMSB_BITMASK 0x1f
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_VECMSB_BITSHFT 7
#define MD_SDIR_VECMSB_MASK (MD_SDIR_VECMSB_BITMASK << 11)
#define MD_SDIR_VECLSB_SHFT 5
#define MD_SDIR_VECLSB_BITMASK 0x7ff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_VECLSB_BITSHFT 0
#define MD_SDIR_VECLSB_MASK (MD_SDIR_VECLSB_BITMASK << 5)
#define MD_SDIR_INIT_LO (MD_DIR_UNOWNED << MD_SDIR_STATE_SHFT | MD_SDIR_AX)
#define MD_SDIR_INIT_HI 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SDIR_INIT_PROT (MD_PROT_RW << MD_SPROT_SHFT)
#define MD_PROT_RW (UINT64_CAST 0x6)
#define MD_PROT_RO (UINT64_CAST 0x3)
#define MD_PROT_NO (UINT64_CAST 0x0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PROT_BAD (UINT64_CAST 0x5)
#define MD_PPROT_SHFT 0
#define MD_PPROT_MASK 7
#define MD_PPROT_MIGMD_SHFT 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PPROT_MIGMD_MASK (3 << 3)
#define MD_PPROT_REFCNT_SHFT 5
#define MD_PPROT_REFCNT_WIDTH 0x7ffff
#define MD_PPROT_REFCNT_MASK (MD_PPROT_REFCNT_WIDTH << 5)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PPROT_IO_SHFT 45
#define MD_PPROT_IO_MASK (UINT64_CAST 7 << 45)
#define MD_SPROT_SHFT 0
#define MD_SPROT_MASK 7
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SPROT_MIGMD_SHFT 3
#define MD_SPROT_MIGMD_MASK (3 << 3)
#define MD_SPROT_REFCNT_SHFT 5
#define MD_SPROT_REFCNT_WIDTH 0x7ff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_SPROT_REFCNT_MASK (MD_SPROT_REFCNT_WIDTH << 5)
#define MD_PROT_MIGMD_IREL (UINT64_CAST 0x3 << 3)
#define MD_PROT_MIGMD_IABS (UINT64_CAST 0x2 << 3)
#define MD_PROT_MIGMD_PREL (UINT64_CAST 0x1 << 3)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PROT_MIGMD_OFF (UINT64_CAST 0x0 << 3)
#ifndef __ASSEMBLY__
#define CPU_LED_ADDR(_nasid, _slice) (private.p_sn00 ? REMOTE_HUB_ADDR((_nasid), MD_UREG1_0 + ((_slice) << 5)) : REMOTE_HUB_ADDR((_nasid), MD_LED0 + ((_slice) << 3)))
#define SET_CPU_LEDS(_nasid, _slice, _val) (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val)))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define SET_MY_LEDS(_v) SET_CPU_LEDS(get_nasid(), get_slice(), (_v))
#define DIRTYPE_PREMIUM 1
#define DIRTYPE_STANDARD 0
#define MD_MEMORY_CONFIG_DIR_TYPE_GET(region) ( (REMOTE_HUB_L(region, MD_MEMORY_CONFIG) & MMC_DIR_PREMIUM_MASK) >> MMC_DIR_PREMIUM_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_DIFF_THRESH_GET(region) ( REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & MD_MIG_DIFF_THRES_VALUE_MASK)
#define MD_MIG_DIFF_THRESH_SET(region, value) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, MD_MIG_DIFF_THRES_VALID_MASK | (value)))
#define MD_MIG_DIFF_THRESH_DISABLE(region) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & ~MD_MIG_DIFF_THRES_VALID_MASK))
#define MD_MIG_DIFF_THRESH_ENABLE(region) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) | MD_MIG_DIFF_THRES_VALID_MASK))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_DIFF_THRESH_IS_ENABLED(region) ( REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & MD_MIG_DIFF_THRES_VALID_MASK)
#define MD_MIG_VALUE_THRESH_GET(region) ( REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & MD_MIG_VALUE_THRES_VALUE_MASK)
#define MD_MIG_VALUE_THRESH_SET(region, value) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, MD_MIG_VALUE_THRES_VALID_MASK | (value)))
#define MD_MIG_VALUE_THRESH_DISABLE(region) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, REMOTE_HUB_L(region, MD_MIG_VALUE_THRESH) & ~MD_MIG_VALUE_THRES_VALID_MASK))
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_VALUE_THRESH_ENABLE(region) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) | MD_MIG_VALUE_THRES_VALID_MASK))
#define MD_MIG_VALUE_THRESH_IS_ENABLED(region) ( REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & MD_MIG_VALUE_THRES_VALID_MASK)
#define MD_MIG_CANDIDATE_GET(my_region_id) ( REMOTE_HUB_L((my_region_id), MD_MIG_CANDIDATE_CLR))
#define MD_MIG_CANDIDATE_HWPFN(value) ((value) & MD_MIG_CANDIDATE_ADDR_MASK)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_MIG_CANDIDATE_NODEID(value) ( ((value) & MD_MIG_CANDIDATE_NODEID_MASK) >> MD_MIG_CANDIDATE_NODEID_SHFT)
#define MD_MIG_CANDIDATE_TYPE(value) ( ((value) & MD_MIG_CANDIDATE_TYPE_MASK) >> MD_MIG_CANDIDATE_TYPE_SHFT)
#define MD_MIG_CANDIDATE_VALID(value) ( ((value) & MD_MIG_CANDIDATE_VALID_MASK) >> MD_MIG_CANDIDATE_VALID_SHFT)
#define MD_PPROT_REFCNT_GET(value) ( ((value) & MD_PPROT_REFCNT_MASK) >> MD_PPROT_REFCNT_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MD_PPROT_MIGMD_GET(value) ( ((value) & MD_PPROT_MIGMD_MASK) >> MD_PPROT_MIGMD_SHFT)
#define MD_SPROT_REFCNT_GET(value) ( ((value) & MD_SPROT_REFCNT_MASK) >> MD_SPROT_REFCNT_SHFT)
#define MD_SPROT_MIGMD_GET(value) ( ((value) & MD_SPROT_MIGMD_MASK) >> MD_SPROT_MIGMD_SHFT)
struct dir_error_reg {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 uce_vld: 1,
ae_vld: 1,
ce_vld: 1,
rsvd1: 19,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
bad_prot: 3,
bad_syn: 7,
rsvd2: 2,
hspec_addr:27,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uce_ovr: 1,
ae_ovr: 1,
ce_ovr: 1;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union md_dir_error {
u64 derr_reg;
struct dir_error_reg derr_fmt;
} md_dir_error_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mem_error_reg {
u64 uce_vld: 1,
ce_vld: 1,
rsvd1: 22,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
bad_syn: 8,
address: 29,
rsvd2: 1,
uce_ovr: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
ce_ovr: 1;
};
typedef union md_mem_error {
u64 merr_reg;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mem_error_reg merr_fmt;
} md_mem_error_t;
struct proto_error_reg {
u64 valid: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
rsvd1: 2,
initiator:11,
backoff: 2,
msg_type: 8,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
access: 2,
priority: 1,
dir_state: 4,
pointer_me:1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
address: 29,
rsvd2: 2,
overrun: 1;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union md_proto_error {
u64 perr_reg;
struct proto_error_reg perr_fmt;
} md_proto_error_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_sdir_high_fmt {
unsigned short sd_hi_bvec : 11,
sd_hi_ecc : 5;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union md_sdir_high {
unsigned short sd_hi_val;
struct md_sdir_high_fmt sd_hi_fmt;
}md_sdir_high_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_sdir_low_shared_fmt {
unsigned short sds_lo_bvec : 5,
sds_lo_unused: 1,
sds_lo_state : 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sds_lo_prio : 1,
sds_lo_ax : 1,
sds_lo_ecc : 5;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_sdir_low_exclusive_fmt {
unsigned short sde_lo_ptr : 6,
sde_lo_state : 3,
sde_lo_prio : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sde_lo_ax : 1,
sde_lo_ecc : 5;
};
typedef union md_sdir_low {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
unsigned short sd_lo_val;
struct md_sdir_low_exclusive_fmt sde_lo_fmt;
struct md_sdir_low_shared_fmt sds_lo_fmt;
}md_sdir_low_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_pdir_high_fmt {
u64 pd_hi_unused : 16,
pd_hi_bvec : 38,
pd_hi_unused1 : 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
pd_hi_ecc : 7;
};
typedef union md_pdir_high {
u64 pd_hi_val;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_pdir_high_fmt pd_hi_fmt;
}md_pdir_high_t;
struct md_pdir_low_shared_fmt {
u64 pds_lo_unused : 16,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
pds_lo_bvec : 26,
pds_lo_cnt : 6,
pds_lo_state : 3,
pds_lo_ste : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
pds_lo_prio : 4,
pds_lo_ax : 1,
pds_lo_ecc : 7;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_pdir_low_exclusive_fmt {
u64 pde_lo_unused : 31,
pde_lo_ptr : 11,
pde_lo_unused1 : 6,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
pde_lo_state : 3,
pde_lo_ste : 1,
pde_lo_prio : 4,
pde_lo_ax : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
pde_lo_ecc : 7;
};
typedef union md_pdir_loent {
u64 pd_lo_val;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct md_pdir_low_exclusive_fmt pde_lo_fmt;
struct md_pdir_low_shared_fmt pds_lo_fmt;
}md_pdir_low_t;
typedef union md_dir_high {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
md_sdir_high_t md_sdir_high;
md_pdir_high_t md_pdir_high;
} md_dir_high_t;
typedef union md_dir_low {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
md_sdir_low_t md_sdir_low;
md_pdir_low_t md_pdir_low;
} md_dir_low_t;
typedef struct bddir_entry {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
md_dir_low_t md_dir_low;
md_dir_high_t md_dir_high;
} bddir_entry_t;
typedef struct dir_mem_entry {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 prcpf[MAX_REGIONS];
bddir_entry_t directory_words[MD_PAGE_SIZE/CACHE_SLINE_SIZE];
} dir_mem_entry_t;
typedef union md_perf_sel {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 perf_sel_reg;
struct {
u64 perf_rsvd : 60,
perf_en : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
perf_sel : 3;
} perf_sel_bits;
} md_perf_sel_t;
typedef union md_perf_cnt {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 perf_cnt;
struct {
u64 perf_rsvd : 44,
perf_cnt : 20;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} perf_cnt_bits;
} md_perf_cnt_t;
#endif
#define DIR_ERROR_VALID_MASK 0xe000000000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define DIR_ERROR_VALID_SHFT 61
#define DIR_ERROR_VALID_UCE 0x8000000000000000
#define DIR_ERROR_VALID_AE 0x4000000000000000
#define DIR_ERROR_VALID_CE 0x2000000000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MEM_ERROR_VALID_MASK 0xc000000000000000
#define MEM_ERROR_VALID_SHFT 62
#define MEM_ERROR_VALID_UCE 0x8000000000000000
#define MEM_ERROR_VALID_CE 0x4000000000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PROTO_ERROR_VALID_MASK 0x8000000000000000
#define MISC_ERROR_VALID_MASK 0x3ff
#define DIR_ERR_HSPEC_MASK 0x3ffffff8
#define ERROR_HSPEC_MASK 0x3ffffff8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define ERROR_HSPEC_SHFT 3
#define ERROR_ADDR_MASK 0xfffffff8
#define ERROR_ADDR_SHFT 3
#define MMCE_VALID_MASK 0x3ff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMCE_ILL_MSG_SHFT 8
#define MMCE_ILL_MSG_MASK (UINT64_CAST 0x03 << MMCE_ILL_MSG_SHFT)
#define MMCE_ILL_REV_SHFT 6
#define MMCE_ILL_REV_MASK (UINT64_CAST 0x03 << MMCE_ILL_REV_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMCE_LONG_PACK_SHFT 4
#define MMCE_LONG_PACK_MASK (UINT64_CAST 0x03 << MMCE_lONG_PACK_SHFT)
#define MMCE_SHORT_PACK_SHFT 2
#define MMCE_SHORT_PACK_MASK (UINT64_CAST 0x03 << MMCE_SHORT_PACK_SHFT)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MMCE_BAD_DATA_SHFT 0
#define MMCE_BAD_DATA_MASK (UINT64_CAST 0x03 << MMCE_BAD_DATA_SHFT)
#define MD_PERF_COUNTERS 6
#define MD_PERF_SETS 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MEM_DIMM_MASK 0xe0000000
#define MEM_DIMM_SHFT 29
#endif

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@@ -0,0 +1,225 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ASM_SGI_SN0_HUBNI_H
#define _ASM_SGI_SN0_HUBNI_H
#ifndef __ASSEMBLY__
#include <linux/types.h>
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif
#define NI_BASE 0x600000
#define NI_BASE_TABLES 0x630000
#define NI_STATUS_REV_ID 0x600000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_PORT_RESET 0x600008
#define NI_PROTECTION 0x600010
#define NI_GLOBAL_PARMS 0x600018
#define NI_SCRATCH_REG0 0x600100
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_SCRATCH_REG1 0x600108
#define NI_DIAG_PARMS 0x600110
#define NI_VECTOR_PARMS 0x600200
#define NI_VECTOR 0x600208
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_VECTOR_DATA 0x600210
#define NI_VECTOR_STATUS 0x600300
#define NI_RETURN_VECTOR 0x600308
#define NI_VECTOR_READ_DATA 0x600310
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_VECTOR_CLEAR 0x600380
#define NI_IO_PROTECT 0x600400
#define NI_IO_PROT_OVRRD 0x600408
#define NI_AGE_CPU0_MEMORY 0x600500
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_AGE_CPU0_PIO 0x600508
#define NI_AGE_CPU1_MEMORY 0x600510
#define NI_AGE_CPU1_PIO 0x600518
#define NI_AGE_GBR_MEMORY 0x600520
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_AGE_GBR_PIO 0x600528
#define NI_AGE_IO_MEMORY 0x600530
#define NI_AGE_IO_PIO 0x600538
#define NI_AGE_REG_MIN NI_AGE_CPU0_MEMORY
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_AGE_REG_MAX NI_AGE_IO_PIO
#define NI_PORT_PARMS 0x608000
#define NI_PORT_ERROR 0x608008
#define NI_PORT_ERROR_CLEAR 0x608088
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_META_TABLE0 0x638000
#define NI_META_TABLE(_x) (NI_META_TABLE0 + (8 * (_x)))
#define NI_META_ENTRIES 32
#define NI_LOCAL_TABLE0 0x638100
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NI_LOCAL_TABLE(_x) (NI_LOCAL_TABLE0 + (8 * (_x)))
#define NI_LOCAL_ENTRIES 16
#define NSRI_8BITMODE_SHFT 30
#define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NSRI_LINKUP_SHFT 29
#define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29)
#define NSRI_DOWNREASON_SHFT 28
#define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NSRI_MORENODES_SHFT 18
#define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18)
#define MORE_MEMORY 0
#define MORE_NODES 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NSRI_REGIONSIZE_SHFT 17
#define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17)
#define REGIONSIZE_FINE 1
#define REGIONSIZE_COARSE 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NSRI_NODEID_SHFT 8
#define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)
#define NSRI_REV_SHFT 4
#define NSRI_REV_MASK (UINT64_CAST 0xf << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NSRI_CHIPID_SHFT 0
#define NSRI_CHIPID_MASK (UINT64_CAST 0xf)
#define NASID_TO_FINEREG_SHFT 0
#define NASID_TO_COARSEREG_SHFT 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPR_PORTRESET (UINT64_CAST 1 << 7)
#define NPR_LINKRESET (UINT64_CAST 1 << 1)
#define NPR_LOCALRESET (UINT64_CAST 1)
#define NPROT_RESETOK (UINT64_CAST 1)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NGP_MAXRETRY_SHFT 48
#define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48)
#define NGP_TAILTOWRAP_SHFT 32
#define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NGP_CREDITTOVAL_SHFT 16
#define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16)
#define NGP_TAILTOVAL_SHFT 4
#define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NDP_PORTTORESET (UINT64_CAST 1 << 18)
#define NDP_LLP8BITMODE (UINT64_CAST 1 << 12)
#define NDP_PORTDISABLE (UINT64_CAST 1 << 6)
#define NDP_SENDERROR (UINT64_CAST 1)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NVP_PIOID_SHFT 40
#define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40)
#define NVP_WRITEID_SHFT 32
#define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8)
#define NVP_TYPE_SHFT 0
#define NVP_TYPE_MASK (UINT64_CAST 0x3)
#define NVS_VALID (UINT64_CAST 1 << 63)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NVS_OVERRUN (UINT64_CAST 1 << 62)
#define NVS_TARGET_SHFT 51
#define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51)
#define NVS_PIOID_SHFT 40
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40)
#define NVS_WRITEID_SHFT 32
#define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32)
#define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NVS_TYPE_SHFT 0
#define NVS_TYPE_MASK (UINT64_CAST 0x7)
#define NVS_ERROR_MASK (UINT64_CAST 0x4)
#define PIOTYPE_READ 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PIOTYPE_WRITE 1
#define PIOTYPE_UNDEFINED 2
#define PIOTYPE_EXCHANGE 3
#define PIOTYPE_ADDR_ERR 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PIOTYPE_CMD_ERR 5
#define PIOTYPE_PROT_ERR 6
#define PIOTYPE_UNKNOWN 7
#define NAGE_VCH_SHFT 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NAGE_VCH_MASK (UINT64_CAST 3 << 10)
#define NAGE_CC_SHFT 8
#define NAGE_CC_MASK (UINT64_CAST 3 << 8)
#define NAGE_AGE_SHFT 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NAGE_AGE_MASK (UINT64_CAST 0xff)
#define NAGE_MASK (NAGE_VCH_MASK | NAGE_CC_MASK | NAGE_AGE_MASK)
#define VCHANNEL_A 0
#define VCHANNEL_B 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VCHANNEL_ANY 2
#define NPP_NULLTO_SHFT 10
#define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16)
#define NPP_MAXBURST_SHFT 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff)
#define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
#define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
#define NPE_LINKRESET (UINT64_CAST 1 << 37)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPE_INTERNALERROR (UINT64_CAST 1 << 36)
#define NPE_BADMESSAGE (UINT64_CAST 1 << 35)
#define NPE_BADDEST (UINT64_CAST 1 << 34)
#define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPE_CREDITTO_SHFT 28
#define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28)
#define NPE_TAILTO_SHFT 24
#define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPE_RETRYCOUNT_SHFT 16
#define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16)
#define NPE_CBERRCOUNT_SHFT 8
#define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPE_SNERRCOUNT_SHFT 0
#define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0)
#define NPE_MASK 0x3effffffff
#define NPE_COUNT_MAX 0xff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define NPE_FATAL_ERRORS (NPE_LINKRESET | NPE_INTERNALERROR | NPE_BADMESSAGE | NPE_BADDEST | NPE_FIFOOVERFLOW | NPE_CREDITTO_MASK | NPE_TAILTO_MASK)
#define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf)
#define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf)
#ifndef __ASSEMBLY__
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union hubni_port_error_u {
u64 nipe_reg_value;
struct {
u64 nipe_rsvd: 26,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
nipe_lnk_reset: 1,
nipe_intl_err: 1,
nipe_bad_msg: 1,
nipe_bad_dest: 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
nipe_fifo_ovfl: 1,
nipe_rsvd1: 1,
nipe_credit_to: 4,
nipe_tail_to: 4,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
nipe_retry_cnt: 8,
nipe_cb_cnt: 8,
nipe_sn_cnt: 8;
} nipe_fields_s;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
} hubni_port_error_t;
#define NI_LLP_RETRY_MAX 0xff
#define NI_LLP_CB_MAX 0xff
#define NI_LLP_SN_MAX 0xff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif
#endif

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@@ -0,0 +1,364 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _ASM_SN_SN0_HUBPI_H
#define _ASM_SN_SN0_HUBPI_H
#include <linux/types.h>
#define PI_BASE 0x000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CPU_PROTECT 0x000000
#define PI_PROT_OVERRD 0x000008
#define PI_IO_PROTECT 0x000010
#define PI_REGION_PRESENT 0x000018
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CPU_NUM 0x000020
#define PI_CALIAS_SIZE 0x000028
#define PI_MAX_CRB_TIMEOUT 0x000030
#define PI_CRB_SFACTOR 0x000038
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CALIAS_SIZE_0 0
#define PI_CALIAS_SIZE_4K 1
#define PI_CALIAS_SIZE_8K 2
#define PI_CALIAS_SIZE_16K 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CALIAS_SIZE_32K 4
#define PI_CALIAS_SIZE_64K 5
#define PI_CALIAS_SIZE_128K 6
#define PI_CALIAS_SIZE_256K 7
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CALIAS_SIZE_512K 8
#define PI_CALIAS_SIZE_1M 9
#define PI_CALIAS_SIZE_2M 10
#define PI_CALIAS_SIZE_4M 11
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CALIAS_SIZE_8M 12
#define PI_CALIAS_SIZE_16M 13
#define PI_CALIAS_SIZE_32M 14
#define PI_CALIAS_SIZE_64M 15
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CPU_PRESENT_A 0x000040
#define PI_CPU_PRESENT_B 0x000048
#define PI_CPU_ENABLE_A 0x000050
#define PI_CPU_ENABLE_B 0x000058
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_REPLY_LEVEL 0x000060
#define PI_HARDRESET_BIT 0x020068
#define PI_NMI_A 0x000070
#define PI_NMI_B 0x000078
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_NMI_OFFSET (PI_NMI_B - PI_NMI_A)
#define PI_SOFTRESET 0x000080
#define PI_INT_PEND_MOD 0x000090
#define PI_INT_PEND0 0x000098
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_INT_PEND1 0x0000a0
#define PI_INT_MASK0_A 0x0000a8
#define PI_INT_MASK1_A 0x0000b0
#define PI_INT_MASK0_B 0x0000b8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_INT_MASK1_B 0x0000c0
#define PI_INT_MASK_OFFSET 0x10
#define PI_CC_PEND_SET_A 0x0000c8
#define PI_CC_PEND_SET_B 0x0000d0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_CC_PEND_CLR_A 0x0000d8
#define PI_CC_PEND_CLR_B 0x0000e0
#define PI_CC_MASK 0x0000e8
#define PI_INT_SET_OFFSET 0x08
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_RT_COUNT 0x030100
#define PI_RT_COMPARE_A 0x000108
#define PI_RT_COMPARE_B 0x000110
#define PI_PROFILE_COMPARE 0x000118
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_RT_PEND_A 0x000120
#define PI_RT_PEND_B 0x000128
#define PI_PROF_PEND_A 0x000130
#define PI_PROF_PEND_B 0x000138
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_RT_EN_A 0x000140
#define PI_RT_EN_B 0x000148
#define PI_PROF_EN_A 0x000150
#define PI_PROF_EN_B 0x000158
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_RT_LOCAL_CTRL 0x000160
#define PI_RT_FILTER_CTRL 0x000168
#define PI_COUNT_OFFSET 0x08
#define PI_BIST_WRITE_DATA 0x000200
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_BIST_READ_DATA 0x000208
#define PI_BIST_COUNT_TARG 0x000210
#define PI_BIST_READY 0x000218
#define PI_BIST_SHIFT_LOAD 0x000220
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_BIST_SHIFT_UNLOAD 0x000228
#define PI_BIST_ENTER_RUN 0x000230
#define PI_GFX_PAGE_A 0x000300
#define PI_GFX_CREDIT_CNTR_A 0x000308
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_GFX_BIAS_A 0x000310
#define PI_GFX_INT_CNTR_A 0x000318
#define PI_GFX_INT_CMP_A 0x000320
#define PI_GFX_PAGE_B 0x000328
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_GFX_CREDIT_CNTR_B 0x000330
#define PI_GFX_BIAS_B 0x000338
#define PI_GFX_INT_CNTR_B 0x000340
#define PI_GFX_INT_CMP_B 0x000348
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_GFX_OFFSET (PI_GFX_PAGE_B - PI_GFX_PAGE_A)
#define PI_GFX_PAGE_ENABLE 0x0000010000000000LL
#define PI_ERR_INT_PEND 0x000400
#define PI_ERR_INT_MASK_A 0x000408
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_INT_MASK_B 0x000410
#define PI_ERR_STACK_ADDR_A 0x000418
#define PI_ERR_STACK_ADDR_B 0x000420
#define PI_ERR_STACK_SIZE 0x000428
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STATUS0_A 0x000430
#define PI_ERR_STATUS0_A_RCLR 0x000438
#define PI_ERR_STATUS1_A 0x000440
#define PI_ERR_STATUS1_A_RCLR 0x000448
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STATUS0_B 0x000450
#define PI_ERR_STATUS0_B_RCLR 0x000458
#define PI_ERR_STATUS1_B 0x000460
#define PI_ERR_STATUS1_B_RCLR 0x000468
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_SPOOL_CMP_A 0x000470
#define PI_SPOOL_CMP_B 0x000478
#define PI_CRB_TIMEOUT_A 0x000480
#define PI_CRB_TIMEOUT_B 0x000488
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_SYSAD_ERRCHK_EN 0x000490
#define PI_BAD_CHECK_BIT_A 0x000498
#define PI_BAD_CHECK_BIT_B 0x0004a0
#define PI_NACK_CNT_A 0x0004a8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_NACK_CNT_B 0x0004b0
#define PI_NACK_CMP 0x0004b8
#define PI_STACKADDR_OFFSET (PI_ERR_STACK_ADDR_B - PI_ERR_STACK_ADDR_A)
#define PI_ERRSTAT_OFFSET (PI_ERR_STATUS0_B - PI_ERR_STATUS0_A)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_RDCLR_OFFSET (PI_ERR_STATUS0_A_RCLR - PI_ERR_STATUS0_A)
#define PI_ERR_SPOOL_CMP_B 0x00000001
#define PI_ERR_SPOOL_CMP_A 0x00000002
#define PI_ERR_SPUR_MSG_B 0x00000004
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_SPUR_MSG_A 0x00000008
#define PI_ERR_WRB_TERR_B 0x00000010
#define PI_ERR_WRB_TERR_A 0x00000020
#define PI_ERR_WRB_WERR_B 0x00000040
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_WRB_WERR_A 0x00000080
#define PI_ERR_SYSSTATE_B 0x00000100
#define PI_ERR_SYSSTATE_A 0x00000200
#define PI_ERR_SYSAD_DATA_B 0x00000400
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_SYSAD_DATA_A 0x00000800
#define PI_ERR_SYSAD_ADDR_B 0x00001000
#define PI_ERR_SYSAD_ADDR_A 0x00002000
#define PI_ERR_SYSCMD_DATA_B 0x00004000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_SYSCMD_DATA_A 0x00008000
#define PI_ERR_SYSCMD_ADDR_B 0x00010000
#define PI_ERR_SYSCMD_ADDR_A 0x00020000
#define PI_ERR_BAD_SPOOL_B 0x00040000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_BAD_SPOOL_A 0x00080000
#define PI_ERR_UNCAC_UNCORR_B 0x00100000
#define PI_ERR_UNCAC_UNCORR_A 0x00200000
#define PI_ERR_SYSSTATE_TAG_B 0x00400000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_SYSSTATE_TAG_A 0x00800000
#define PI_ERR_MD_UNCORR 0x01000000
#define PI_ERR_CLEAR_ALL_A 0x00aaaaaa
#define PI_ERR_CLEAR_ALL_B 0x00555555
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_FATAL_ERR_CPU_A (PI_ERR_SYSSTATE_TAG_A | PI_ERR_BAD_SPOOL_A | PI_ERR_SYSCMD_ADDR_A | PI_ERR_SYSCMD_DATA_A | PI_ERR_SYSAD_ADDR_A | PI_ERR_SYSAD_DATA_A | PI_ERR_SYSSTATE_A)
#define PI_MISC_ERR_CPU_A (PI_ERR_UNCAC_UNCORR_A | PI_ERR_WRB_WERR_A | PI_ERR_WRB_TERR_A | PI_ERR_SPUR_MSG_A | PI_ERR_SPOOL_CMP_A)
#define PI_FATAL_ERR_CPU_B (PI_ERR_SYSSTATE_TAG_B | PI_ERR_BAD_SPOOL_B | PI_ERR_SYSCMD_ADDR_B | PI_ERR_SYSCMD_DATA_B | PI_ERR_SYSAD_ADDR_B | PI_ERR_SYSAD_DATA_B | PI_ERR_SYSSTATE_B)
#define PI_MISC_ERR_CPU_B (PI_ERR_UNCAC_UNCORR_B | PI_ERR_WRB_WERR_B | PI_ERR_WRB_TERR_B | PI_ERR_SPUR_MSG_B | PI_ERR_SPOOL_CMP_B)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_GENERIC (PI_ERR_MD_UNCORR)
#define PI_ERR_ST0_TYPE_MASK 0x0000000000000007
#define PI_ERR_ST0_TYPE_SHFT 0
#define PI_ERR_ST0_REQNUM_MASK 0x0000000000000038
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST0_REQNUM_SHFT 3
#define PI_ERR_ST0_SUPPL_MASK 0x000000000001ffc0
#define PI_ERR_ST0_SUPPL_SHFT 6
#define PI_ERR_ST0_CMD_MASK 0x0000000001fe0000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST0_CMD_SHFT 17
#define PI_ERR_ST0_ADDR_MASK 0x3ffffffffe000000
#define PI_ERR_ST0_ADDR_SHFT 25
#define PI_ERR_ST0_OVERRUN_MASK 0x4000000000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST0_OVERRUN_SHFT 62
#define PI_ERR_ST0_VALID_MASK 0x8000000000000000
#define PI_ERR_ST0_VALID_SHFT 63
#define PI_ERR_ST1_SPOOL_MASK 0x00000000001fffff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST1_SPOOL_SHFT 0
#define PI_ERR_ST1_TOUTCNT_MASK 0x000000001fe00000
#define PI_ERR_ST1_TOUTCNT_SHFT 21
#define PI_ERR_ST1_INVCNT_MASK 0x0000007fe0000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST1_INVCNT_SHFT 29
#define PI_ERR_ST1_CRBNUM_MASK 0x0000038000000000
#define PI_ERR_ST1_CRBNUM_SHFT 39
#define PI_ERR_ST1_WRBRRB_MASK 0x0000040000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST1_WRBRRB_SHFT 42
#define PI_ERR_ST1_CRBSTAT_MASK 0x001ff80000000000
#define PI_ERR_ST1_CRBSTAT_SHFT 43
#define PI_ERR_ST1_MSGSRC_MASK 0xffe0000000000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_ST1_MSGSRC_SHFT 53
#define PI_ERR_STK_TYPE_MASK 0x0000000000000003
#define PI_ERR_STK_TYPE_SHFT 0
#define PI_ERR_STK_SUPPL_MASK 0x0000000000000038
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STK_SUPPL_SHFT 3
#define PI_ERR_STK_REQNUM_MASK 0x00000000000001c0
#define PI_ERR_STK_REQNUM_SHFT 6
#define PI_ERR_STK_CRBNUM_MASK 0x0000000000000e00
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STK_CRBNUM_SHFT 9
#define PI_ERR_STK_WRBRRB_MASK 0x0000000000001000
#define PI_ERR_STK_WRBRRB_SHFT 12
#define PI_ERR_STK_CRBSTAT_MASK 0x00000000007fe000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STK_CRBSTAT_SHFT 13
#define PI_ERR_STK_CMD_MASK 0x000000007f800000
#define PI_ERR_STK_CMD_SHFT 23
#define PI_ERR_STK_ADDR_MASK 0xffffffff80000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_STK_ADDR_SHFT 31
#define PI_ERR_RD_PRERR 1
#define PI_ERR_RD_DERR 2
#define PI_ERR_RD_TERR 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_WR_WERR 0
#define PI_ERR_WR_PWERR 1
#define PI_ERR_WR_TERR 3
#define PI_ERR_RRB 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_ERR_WRB 1
#define PI_ERR_ANY_CRB 2
#define ERR_STK_ADDR_SHFT 7
#define ERR_STAT0_ADDR_SHFT 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_MIN_STACK_SIZE 4096
#define PI_STACK_SIZE_SHFT 12
#define ERR_STACK_SIZE_BYTES(_sz) ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0)
#ifndef __ASSEMBLY__
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct err_stack_format {
u64 sk_addr : 33,
sk_cmd : 8,
sk_crb_sts : 10,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sk_rw_rb : 1,
sk_crb_num : 3,
sk_t5_req : 3,
sk_suppl : 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
sk_err_type: 3;
};
typedef union pi_err_stack {
u64 pi_stk_word;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct err_stack_format pi_stk_fmt;
} pi_err_stack_t;
struct err_status0_format {
u64 s0_valid : 1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
s0_ovr_run : 1,
s0_addr : 37,
s0_cmd : 8,
s0_supl : 11,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
s0_t5_req : 3,
s0_err_type: 3;
};
typedef union pi_err_stat0 {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 pi_stat0_word;
struct err_status0_format pi_stat0_fmt;
} pi_err_stat0_t;
struct err_status1_format {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u64 s1_src : 11,
s1_crb_sts : 10,
s1_rw_rb : 1,
s1_crb_num : 3,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
s1_inval_cnt:10,
s1_to_cnt : 8,
s1_spl_cnt : 21;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef union pi_err_stat1 {
u64 pi_stat1_word;
struct err_status1_format pi_stat1_fmt;
} pi_err_stat1_t;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
typedef u64 rtc_time_t;
#endif
#define PI_SYSAD_ERRCHK_ECCGEN 0x01
#define PI_SYSAD_ERRCHK_QUALGEN 0x02
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_SYSAD_ERRCHK_SADP 0x04
#define PI_SYSAD_ERRCHK_CMDP 0x08
#define PI_SYSAD_ERRCHK_STATE 0x10
#define PI_SYSAD_ERRCHK_QUAL 0x20
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_SYSAD_CHECK_ALL 0x3f
#define HUB_IP_PEND0 0x0400
#define HUB_IP_PEND1_CC 0x0800
#define HUB_IP_RT 0x1000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define HUB_IP_PROF 0x2000
#define HUB_IP_ERROR 0x4000
#define HUB_IP_MASK 0x7c00
#define PRLC_USE_INT_SHFT 16
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16)
#define PRLC_USE_INT (UINT64_CAST 1 << 16)
#define PRLC_GCLK_SHFT 15
#define PRLC_GCLK_MASK (UINT64_CAST 1 << 15)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PRLC_GCLK (UINT64_CAST 1 << 15)
#define PRLC_GCLK_COUNT_SHFT 8
#define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8)
#define PRLC_MAX_COUNT_SHFT 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1)
#define PRLC_GCLK_EN_SHFT 0
#define PRLC_GCLK_EN_MASK (UINT64_CAST 1)
#define PRLC_GCLK_EN (UINT64_CAST 1)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define PI_NACK_CNT_EN_SHFT 20
#define PI_NACK_CNT_EN_MASK 0x100000
#define PI_NACK_CNT_MASK 0x0fffff
#define PI_NACK_CNT_MAX 0x0fffff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif