am cb0114a1: am 8c054c51: Merge "Clean up the ARM fenv.h, moving implementation details into fenv.c."

* commit 'cb0114a1f6230d7ddd1226dc14979a2272c20c07':
  Clean up the ARM fenv.h, moving implementation details into fenv.c.
This commit is contained in:
Elliott Hughes 2014-06-11 03:04:53 +00:00 committed by Android Git Automerger
commit 3d1a7f1fad
2 changed files with 14 additions and 18 deletions

View File

@ -28,10 +28,11 @@
#include <fenv.h> #include <fenv.h>
/* #define FPSCR_ENABLE_SHIFT 8
* Hopefully the system ID byte is immutable, so it's valid to use #define FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << FPSCR_ENABLE_SHIFT)
* this as a default environment.
*/ #define FPSCR_RMODE_SHIFT 22
const fenv_t __fe_dfl_env = 0; const fenv_t __fe_dfl_env = 0;
int fegetenv(fenv_t* __envp) { int fegetenv(fenv_t* __envp) {
@ -86,14 +87,14 @@ int fetestexcept(int __excepts) {
int fegetround(void) { int fegetround(void) {
fenv_t _fpscr; fenv_t _fpscr;
fegetenv(&_fpscr); fegetenv(&_fpscr);
return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3); return ((_fpscr >> FPSCR_RMODE_SHIFT) & 0x3);
} }
int fesetround(int __round) { int fesetround(int __round) {
fenv_t _fpscr; fenv_t _fpscr;
fegetenv(&_fpscr); fegetenv(&_fpscr);
_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT); _fpscr &= ~(0x3 << FPSCR_RMODE_SHIFT);
_fpscr |= (__round << _FPSCR_RMODE_SHIFT); _fpscr |= (__round << FPSCR_RMODE_SHIFT);
fesetenv(&_fpscr); fesetenv(&_fpscr);
return 0; return 0;
} }
@ -102,7 +103,7 @@ int feholdexcept(fenv_t* __envp) {
fenv_t __env; fenv_t __env;
fegetenv(&__env); fegetenv(&__env);
*__envp = __env; *__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK); __env &= ~(FE_ALL_EXCEPT | FPSCR_ENABLE_MASK);
fesetenv(&__env); fesetenv(&__env);
return 0; return 0;
} }
@ -118,21 +119,21 @@ int feupdateenv(const fenv_t* __envp) {
int feenableexcept(int __mask) { int feenableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr; fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr); fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT; __new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT;
fesetenv(&__new_fpscr); fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
} }
int fedisableexcept(int __mask) { int fedisableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr; fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr); fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT); __new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT);
fesetenv(&__new_fpscr); fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
} }
int fegetexcept(void) { int fegetexcept(void) {
fenv_t __fpscr; fenv_t __fpscr;
fegetenv(&__fpscr); fegetenv(&__fpscr);
return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT); return ((__fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT);
} }

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@ -52,17 +52,12 @@ typedef __uint32_t fexcept_t;
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
FE_OVERFLOW | FE_UNDERFLOW) FE_OVERFLOW | FE_UNDERFLOW)
#define _FPSCR_ENABLE_SHIFT 8
#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT)
/* Rounding modes. */ /* Rounding modes. */
#define FE_TONEAREST 0x0 #define FE_TONEAREST 0x0
#define FE_UPWARD 0x1 #define FE_UPWARD 0x1
#define FE_DOWNWARD 0x2 #define FE_DOWNWARD 0x2
#define FE_TOWARDZERO 0x3 #define FE_TOWARDZERO 0x3
#define _FPSCR_RMODE_SHIFT 22
__END_DECLS __END_DECLS
#endif /* !_ARM_FENV_H_ */ #endif /* !_ARM_FENV_H_ */