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Use CLZ on ARMv5 and newer

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Change-Id: Ia5aa6974c0343ae43fbcb91304501213048e9ec0
This commit is contained in:
Kenny Root 2011-02-16 16:39:04 -08:00
parent 0d06b42327
commit 3a3c1853ac
1 changed files with 5 additions and 5 deletions
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10
libc/arch-arm/bionic/ffs.S
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@ -36,8 +36,8 @@
* 6 bits as an index into the table. This algorithm should be a win * 6 bits as an index into the table. This algorithm should be a win
* over the checking each bit in turn as per the C compiled version. * over the checking each bit in turn as per the C compiled version.
* *
* under ARMv5 there's an instruction called CLZ (count leading Zero's) that * Some newer ARM architectures have an instruction named
* could be used * CLZ (count leading Zero's) that is used
* *
* This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on * This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on
* 16 Feb 1994. * 16 Feb 1994.
@ -47,7 +47,7 @@ ENTRY(ffs)
/* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */ /* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */
rsb r1, r0, #0 rsb r1, r0, #0
ands r0, r0, r1 ands r0, r0, r1
#ifndef __ARM_ARCH_5__ #ifndef __ARM_HAVE_CLZ
/* /*
* now r0 has at most one set bit, call this X * now r0 has at most one set bit, call this X
* if X = 0, all further instructions are skipped * if X = 0, all further instructions are skipped
@ -74,9 +74,9 @@ ENTRY(ffs)
.byte 10, 0, 0, 25, 0, 0, 21, 27 /* 40-47 */ .byte 10, 0, 0, 25, 0, 0, 21, 27 /* 40-47 */
.byte 31, 0, 0, 0, 0, 24, 0, 20 /* 48-55 */ .byte 31, 0, 0, 0, 0, 24, 0, 20 /* 48-55 */
.byte 30, 0, 23, 19, 29, 18, 17, 0 /* 56-63 */ .byte 30, 0, 23, 19, 29, 18, 17, 0 /* 56-63 */
#else #else /* !defined(__ARM_HAVE_CLZ) */
clzne r0, r0 clzne r0, r0
rsbne r0, r0, #32 rsbne r0, r0, #32
bx lr bx lr
#endif #endif /* !defined(__ARM_HAVE_CLZ) */