Update kernel headers to v3.14.
Other changes: - Modify update_all.py to skip ion header files when importing into aosp. - Fix generate_uapi_headers.sh to handle imports from a linux-stable kernel. Change-Id: I1ad81b9ccb063c21740f9875f2cc1238052cd4b3
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@@ -44,10 +44,10 @@
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#define IRQ26_MODE 0x00000002
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#define SVC26_MODE 0x00000003
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#define USR_MODE 0x00000010
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#define FIQ_MODE 0x00000011
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IRQ_MODE 0x00000012
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#define SVC_MODE 0x00000013
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define FIQ_MODE 0x00000011
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#define IRQ_MODE 0x00000012
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#define ABT_MODE 0x00000017
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#define HYP_MODE 0x0000001a
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -56,63 +56,65 @@
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#define MODE32_BIT 0x00000010
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#define MODE_MASK 0x0000001f
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_T_BIT 0x00000020
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#define V4_PSR_T_BIT 0x00000020
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#define V7M_PSR_T_BIT 0x01000000
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#define PSR_T_BIT V4_PSR_T_BIT
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#define PSR_F_BIT 0x00000040
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_I_BIT 0x00000080
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#define PSR_A_BIT 0x00000100
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_E_BIT 0x00000200
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#define PSR_J_BIT 0x01000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_Q_BIT 0x08000000
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#define PSR_V_BIT 0x10000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_C_BIT 0x20000000
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#define PSR_Z_BIT 0x40000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_N_BIT 0x80000000
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#define PSR_f 0xff000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_s 0x00ff0000
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#define PSR_x 0x0000ff00
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_c 0x000000ff
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#define APSR_MASK 0xf80f0000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_ISET_MASK 0x01000010
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#define PSR_IT_MASK 0x0600fc00
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PSR_ENDIAN_MASK 0x00000200
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#define PSR_ENDSTATE 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PT_TEXT_ADDR 0x10000
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#define PT_DATA_ADDR 0x10004
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PT_TEXT_END_ADDR 0x10008
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#ifndef __ASSEMBLY__
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct pt_regs {
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long uregs[18];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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#define ARM_cpsr uregs[16]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_pc uregs[15]
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#define ARM_lr uregs[14]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_sp uregs[13]
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#define ARM_ip uregs[12]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_fp uregs[11]
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#define ARM_r10 uregs[10]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_r9 uregs[9]
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#define ARM_r8 uregs[8]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_r7 uregs[7]
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#define ARM_r6 uregs[6]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_r5 uregs[5]
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#define ARM_r4 uregs[4]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_r3 uregs[3]
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#define ARM_r2 uregs[2]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_r1 uregs[1]
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#define ARM_r0 uregs[0]
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ARM_ORIG_r0 uregs[17]
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#define ARM_VFPREGS_SIZE ( 32 * 8 + 4 )
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#endif
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#endif
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