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Merge "Moved to a more openbsd-like fenv.h"

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This commit is contained in:
Calin Juravle 2014-02-26 20:34:41 +00:00 committed by Gerrit Code Review
commit 35036961f8
13 changed files with 1021 additions and 1040 deletions
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103
libm/arm/fenv.c
View File

@ -33,3 +33,106 @@
* this as a default environment.
*/
const fenv_t __fe_dfl_env = 0;
int fegetenv(fenv_t* __envp) {
fenv_t _fpscr;
__asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
*__envp = _fpscr;
return 0;
}
int fesetenv(const fenv_t* __envp) {
fenv_t _fpscr = *__envp;
__asm__ __volatile__("vmsr fpscr,%0" : :"ri" (_fpscr));
return 0;
}
int feclearexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
fesetenv(&__fpscr);
return 0;
}
int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
*__flagp = __fpscr & __excepts;
return 0;
}
int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
__fpscr |= *__flagp & __excepts;
fesetenv(&__fpscr);
return 0;
}
int feraiseexcept(int __excepts) {
fexcept_t __ex = __excepts;
fesetexceptflag(&__ex, __excepts);
return 0;
}
int fetestexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
return (__fpscr & __excepts);
}
int fegetround(void) {
fenv_t _fpscr;
fegetenv(&_fpscr);
return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3);
}
int fesetround(int __round) {
fenv_t _fpscr;
fegetenv(&_fpscr);
_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT);
_fpscr |= (__round << _FPSCR_RMODE_SHIFT);
fesetenv(&_fpscr);
return 0;
}
int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
int feupdateenv(const fenv_t* __envp) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
fesetenv(__envp);
feraiseexcept(__fpscr & FE_ALL_EXCEPT);
return 0;
}
int feenableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT;
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fedisableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT);
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fegetexcept(void) {
fenv_t __fpscr;
fegetenv(&__fpscr);
return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT);
}

106
libm/arm64/fenv.c
View File

@ -33,3 +33,109 @@
* this as a default environment.
*/
const fenv_t __fe_dfl_env = 0;
int fegetenv(fenv_t* __envp) {
fenv_t _fpcr, _fpsr;
__asm__ __volatile__("mrs %0,fpcr" : "=r" (_fpcr));
__asm__ __volatile__("mrs %0,fpsr" : "=r" (_fpsr));
*__envp = (_fpcr | _fpsr);
return 0;
}
int fesetenv(const fenv_t* __envp) {
fenv_t _fpcr = (*__envp & FPCR_MASK);
fenv_t _fpsr = (*__envp & FPSR_MASK);
__asm__ __volatile__("msr fpcr,%0" : :"ri" (_fpcr));
__asm__ __volatile__("msr fpsr,%0" : :"ri" (_fpsr));
return 0;
}
int feclearexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
fesetenv(&__fpscr);
return 0;
}
int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
*__flagp = __fpscr & __excepts;
return 0;
}
int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
__fpscr |= *__flagp & __excepts;
fesetenv(&__fpscr);
return 0;
}
int feraiseexcept(int __excepts) {
fexcept_t __ex = __excepts;
fesetexceptflag(&__ex, __excepts);
return 0;
}
int fetestexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
return (__fpscr & __excepts);
}
int fegetround(void) {
fenv_t _fpscr;
fegetenv(&_fpscr);
return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3);
}
int fesetround(int __round) {
fenv_t _fpscr;
fegetenv(&_fpscr);
_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT);
_fpscr |= (__round << _FPSCR_RMODE_SHIFT);
fesetenv(&_fpscr);
return 0;
}
int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
int feupdateenv(const fenv_t* __envp) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
fesetenv(__envp);
feraiseexcept(__fpscr & FE_ALL_EXCEPT);
return 0;
}
int feenableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT;
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fedisableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT);
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fegetexcept(void) {
fenv_t __fpscr;
fegetenv(&__fpscr);
return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT);
}

55
libm/include/amd64/fenv.h → libm/include/amd64/machine/fenv.h
View File

@ -29,12 +29,6 @@
#include <sys/types.h>
/*
* This file combines the OpenBSD include/fenv.h and machine/fenv.h to fit
* the style of the other architectures (where we couldn't just take an
* upstream fenv.h and had to write our own).
*/
__BEGIN_DECLS
/*
@ -83,26 +77,14 @@ __BEGIN_DECLS
*/
typedef struct {
struct {
unsigned int __control; /* Control word register */
unsigned int __status; /* Status word register */
unsigned int __tag; /* Tag word register */
unsigned int __others[4]; /* EIP, Pointer Selector, etc */
__uint32_t __control; /* Control word register */
__uint32_t __status; /* Status word register */
__uint32_t __tag; /* Tag word register */
__uint32_t __others[4]; /* EIP, Pointer Selector, etc */
} __x87;
unsigned int __mxcsr; /* Control, status register */
__uint32_t __mxcsr; /* Control, status register */
} fenv_t;
/*
* The following constant represents the default floating-point environment
* (that is, the one installed at program startup) and has type pointer to
* const-qualified fenv_t.
*
* It can be used as an argument to the functions within the <fenv.h> header
* that manage the floating-point environment, namely fesetenv() and
* feupdateenv().
*/
extern fenv_t __fe_dfl_env;
#define FE_DFL_ENV ((const fenv_t *)&__fe_dfl_env)
/*
* fexcept_t represents the floating-point status flags collectively, including
* any status the implementation associates with the flags.
@ -115,32 +97,7 @@ extern fenv_t __fe_dfl_env;
* A floating-point control mode is a system variable whose value may be set by
* the user to affect the subsequent behavior of floating-point arithmetic.
*/
typedef unsigned int fexcept_t;
/* C99 floating-point exception functions */
int feclearexcept(int excepts);
int fegetexceptflag(fexcept_t *flagp, int excepts);
int fesetexceptflag(const fexcept_t *flagp, int excepts);
/* feraiseexcept does not set the inexact flag on overflow/underflow */
int feraiseexcept(int excepts);
int fetestexcept(int excepts);
/* C99 rounding control functions */
int fegetround(void);
int fesetround(int round);
/* C99 floating-point environment functions */
int fegetenv(fenv_t *__envp);
int feholdexcept(fenv_t *__envp);
int fesetenv(const fenv_t *envp);
int feupdateenv(const fenv_t *__envp);
#if __BSD_VISIBLE
/* Additional support functions to set/query floating point traps */
int feenableexcept(int __mask);
int fedisableexcept(int __mask);
int fegetexcept(void);
#endif /* __BSD_VISIBLE */
typedef __uint_32 fexcept_t;
__END_DECLS

176
libm/include/arm/fenv.h
View File

@ -1,176 +0,0 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
*/
/*
* Rewritten for Android.
*
* The ARM FPSCR is described here:
* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Chdfafia.html
*/
#ifndef _FENV_H_
#define _FENV_H_
#include <sys/types.h>
__BEGIN_DECLS
typedef __uint32_t fenv_t;
typedef __uint32_t fexcept_t;
/* Exception flags. */
#define FE_INVALID 0x01
#define FE_DIVBYZERO 0x02
#define FE_OVERFLOW 0x04
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x10
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
#define _FPSCR_ENABLE_SHIFT 8
#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT)
/* Rounding modes. */
#define FE_TONEAREST 0x0
#define FE_UPWARD 0x1
#define FE_DOWNWARD 0x2
#define FE_TOWARDZERO 0x3
#define _FPSCR_RMODE_SHIFT 22
/* Default floating-point environment. */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
static __inline int fegetenv(fenv_t* __envp) {
fenv_t _fpscr;
__asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
*__envp = _fpscr;
return 0;
}
static __inline int fesetenv(const fenv_t* __envp) {
fenv_t _fpscr = *__envp;
__asm__ __volatile__("vmsr fpscr,%0" : :"ri" (_fpscr));
return 0;
}
static __inline int feclearexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
fesetenv(&__fpscr);
return 0;
}
static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
*__flagp = __fpscr & __excepts;
return 0;
}
static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
__fpscr |= *__flagp & __excepts;
fesetenv(&__fpscr);
return 0;
}
static __inline int feraiseexcept(int __excepts) {
fexcept_t __ex = __excepts;
fesetexceptflag(&__ex, __excepts);
return 0;
}
static __inline int fetestexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
return (__fpscr & __excepts);
}
static __inline int fegetround(void) {
fenv_t _fpscr;
fegetenv(&_fpscr);
return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3);
}
static __inline int fesetround(int __round) {
fenv_t _fpscr;
fegetenv(&_fpscr);
_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT);
_fpscr |= (__round << _FPSCR_RMODE_SHIFT);
fesetenv(&_fpscr);
return 0;
}
static __inline int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
static __inline int feupdateenv(const fenv_t* __envp) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
fesetenv(__envp);
feraiseexcept(__fpscr & FE_ALL_EXCEPT);
return 0;
}
#if __BSD_VISIBLE
static __inline int feenableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT;
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fedisableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT);
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fegetexcept(void) {
fenv_t __fpscr;
fegetenv(&__fpscr);
return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */

68
libm/include/arm/machine/fenv.h Normal file
View File

@ -0,0 +1,68 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
*/
/*
* Rewritten for Android.
*
* The ARM FPSCR is described here:
* http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Chdfafia.html
*/
#ifndef _ARM_FENV_H_
#define _ARM_FENV_H_
#include <sys/types.h>
__BEGIN_DECLS
typedef __uint32_t fenv_t;
typedef __uint32_t fexcept_t;
/* Exception flags. */
#define FE_INVALID 0x01
#define FE_DIVBYZERO 0x02
#define FE_OVERFLOW 0x04
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x10
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
FE_OVERFLOW | FE_UNDERFLOW)
#define _FPSCR_ENABLE_SHIFT 8
#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT)
/* Rounding modes. */
#define FE_TONEAREST 0x0
#define FE_UPWARD 0x1
#define FE_DOWNWARD 0x2
#define FE_TOWARDZERO 0x3
#define _FPSCR_RMODE_SHIFT 22
__END_DECLS
#endif /* !_ARM_FENV_H_ */

125
libm/include/arm64/fenv.h → libm/include/arm64/machine/fenv.h
View File

@ -38,8 +38,8 @@
* section 5.1.2 SIMD and Floating-Point Registers
*/
#ifndef _FENV_H_
#define _FENV_H_
#ifndef _ARM64_FENV_H_
#define _ARM64_FENV_H_
#include <sys/types.h>
@ -54,7 +54,9 @@ typedef __uint32_t fexcept_t;
#define FE_OVERFLOW 0x04
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x10
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
FE_OVERFLOW | FE_UNDERFLOW)
#define _FPSCR_ENABLE_SHIFT 8
#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT)
@ -63,6 +65,7 @@ typedef __uint32_t fexcept_t;
#define FE_UPWARD 0x1
#define FE_DOWNWARD 0x2
#define FE_TOWARDZERO 0x3
#define _FPSCR_RMODE_SHIFT 22
#define FPCR_IOE (1 << 8)
@ -113,120 +116,6 @@ typedef __uint32_t fexcept_t;
FPSR_Z | \
FPSR_N )
/* Default floating-point environment. */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
static __inline int fegetenv(fenv_t* __envp) {
fenv_t _fpcr, _fpsr;
__asm__ __volatile__("mrs %0,fpcr" : "=r" (_fpcr));
__asm__ __volatile__("mrs %0,fpsr" : "=r" (_fpsr));
*__envp = (_fpcr | _fpsr);
return 0;
}
static __inline int fesetenv(const fenv_t* __envp) {
fenv_t _fpcr = (*__envp & FPCR_MASK);
fenv_t _fpsr = (*__envp & FPSR_MASK);
__asm__ __volatile__("msr fpcr,%0" : :"ri" (_fpcr));
__asm__ __volatile__("msr fpsr,%0" : :"ri" (_fpsr));
return 0;
}
static __inline int feclearexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
fesetenv(&__fpscr);
return 0;
}
static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
*__flagp = __fpscr & __excepts;
return 0;
}
static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
__fpscr &= ~__excepts;
__fpscr |= *__flagp & __excepts;
fesetenv(&__fpscr);
return 0;
}
static __inline int feraiseexcept(int __excepts) {
fexcept_t __ex = __excepts;
fesetexceptflag(&__ex, __excepts);
return 0;
}
static __inline int fetestexcept(int __excepts) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
return (__fpscr & __excepts);
}
static __inline int fegetround(void) {
fenv_t _fpscr;
fegetenv(&_fpscr);
return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3);
}
static __inline int fesetround(int __round) {
fenv_t _fpscr;
fegetenv(&_fpscr);
_fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT);
_fpscr |= (__round << _FPSCR_RMODE_SHIFT);
fesetenv(&_fpscr);
return 0;
}
static __inline int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
static __inline int feupdateenv(const fenv_t* __envp) {
fexcept_t __fpscr;
fegetenv(&__fpscr);
fesetenv(__envp);
feraiseexcept(__fpscr & FE_ALL_EXCEPT);
return 0;
}
#if __BSD_VISIBLE
static __inline int feenableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT;
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fedisableexcept(int __mask) {
fenv_t __old_fpscr, __new_fpscr;
fegetenv(&__old_fpscr);
__new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT);
fesetenv(&__new_fpscr);
return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fegetexcept(void) {
fenv_t __fpscr;
fegetenv(&__fpscr);
return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */
#endif /* !_ARM64_FENV_H_ */

69
libm/include/fenv.h Normal file
View File

@ -0,0 +1,69 @@
/* $OpenBSD: fenv.h,v 1.2 2011/05/25 21:46:49 martynas Exp $ */
/* $NetBSD: fenv.h,v 1.2.4.1 2011/02/08 16:18:55 bouyer Exp $ */
/*
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _FENV_H_
#define _FENV_H_
#include <sys/cdefs.h>
#include <machine/fenv.h>
__BEGIN_DECLS
int feclearexcept(int);
int fegetexceptflag(fexcept_t *, int);
int feraiseexcept(int);
int fesetexceptflag(const fexcept_t *, int);
int fetestexcept(int);
int fegetround(void);
int fesetround(int);
int fegetenv(fenv_t *);
int feholdexcept(fenv_t *);
int fesetenv(const fenv_t *);
int feupdateenv(const fenv_t *);
int feenableexcept(int);
int fedisableexcept(int);
int fegetexcept(void);
/*
* The following constant represents the default floating-point environment
* (that is, the one installed at program startup) and has type pointer to
* const-qualified fenv_t.
*
* It can be used as an argument to the functions that manage the floating-point
* environment, namely fesetenv() and feupdateenv().
*/
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
__END_DECLS
#endif /* ! _FENV_H_ */

36
libm/include/i387/fenv.h → libm/include/i387/machine/fenv.h
View File

@ -26,8 +26,8 @@
* $FreeBSD: src/lib/msun/i387/fenv.h,v 1.4 2005/03/17 22:21:46 das Exp $
*/
#ifndef _FENV_H_
#define _FENV_H_
#ifndef _I387_FENV_H_
#define _I387_FENV_H_
#include <sys/types.h>
@ -66,36 +66,6 @@ typedef __uint16_t fexcept_t;
#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
FE_UPWARD | FE_TOWARDZERO)
/* Default floating-point environment */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
/* C99 floating-point exception functions */
int feclearexcept(int excepts);
int fegetexceptflag(fexcept_t *flagp, int excepts);
int fesetexceptflag(const fexcept_t *flagp, int excepts);
/* feraiseexcept does not set the inexact flag on overflow/underflow */
int feraiseexcept(int excepts);
int fetestexcept(int excepts);
/* C99 rounding control functions */
int fegetround(void);
int fesetround(int round);
/* C99 floating-point environment functions */
int fegetenv(fenv_t *__envp);
int feholdexcept(fenv_t *__envp);
int fesetenv(const fenv_t *envp);
int feupdateenv(const fenv_t *__envp);
#if __BSD_VISIBLE
/* Additional support functions to set/query floating point traps */
int feenableexcept(int __mask);
int fedisableexcept(int __mask);
int fegetexcept(void);
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */
#endif /* !I387_FENV_H_ */

225
libm/include/mips/fenv.h
View File

@ -1,225 +0,0 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
*/
/*
Rewritten for Android.
*/
/* MIPS FPU floating point control register bits.
*
* 31-25 -> floating point conditions code bits set by FP compare
* instructions
* 24 -> flush denormalized results to zero instead of
* causing unimplemented operation exception.
* 23 -> Condition bit
* 22 -> In conjunction with FS detects denormalized
* operands and replaces them internally with 0.
* 21 -> In conjunction with FS forces denormalized operands
* to the closest normalized value.
* 20-18 -> reserved (read as 0, write with 0)
* 17 -> cause bit for unimplemented operation
* 16 -> cause bit for invalid exception
* 15 -> cause bit for division by zero exception
* 14 -> cause bit for overflow exception
* 13 -> cause bit for underflow exception
* 12 -> cause bit for inexact exception
* 11 -> enable exception for invalid exception
* 10 -> enable exception for division by zero exception
* 9 -> enable exception for overflow exception
* 8 -> enable exception for underflow exception
* 7 -> enable exception for inexact exception
* 6 -> flag invalid exception
* 5 -> flag division by zero exception
* 4 -> flag overflow exception
* 3 -> flag underflow exception
* 2 -> flag inexact exception
* 1-0 -> rounding control
*
*
* Rounding Control:
* 00 - rounding to nearest (RN)
* 01 - rounding toward zero (RZ)
* 10 - rounding (up) toward plus infinity (RP)
* 11 - rounding (down)toward minus infinity (RM)
*/
#ifndef _FENV_H_
#define _FENV_H_
#include <sys/types.h>
__BEGIN_DECLS
typedef __uint32_t fenv_t;
typedef __uint32_t fexcept_t;
/* Exception flags */
#define FE_INVALID 0x40
#define FE_DIVBYZERO 0x20
#define FE_OVERFLOW 0x10
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x04
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
#define _FCSR_CAUSE_SHIFT 10
#define _ENABLE_SHIFT 5
#define _FCSR_ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_TOWARDZERO 0x0001
#define FE_UPWARD 0x0002
#define FE_DOWNWARD 0x0003
#define _FCSR_RMODE_SHIFT 0
#define _FCSR_RMASK 0x3
/* Default floating-point environment */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
static __inline int fegetenv(fenv_t* __envp) {
fenv_t _fcsr = 0;
#ifdef __mips_hard_float
__asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
#endif
*__envp = _fcsr;
return 0;
}
static __inline int fesetenv(const fenv_t* __envp) {
fenv_t _fcsr = *__envp;
#ifdef __mips_hard_float
__asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
#endif
return 0;
}
static __inline int feclearexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT));
fesetenv(&__fcsr);
return 0;
}
static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
*__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
return 0;
}
static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~__excepts;
__fcsr |= *__flagp & __excepts;
fesetenv(&__fcsr);
return 0;
}
static __inline int feraiseexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
/* Cause bit needs to be set as well for generating the exception*/
__fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT);
fesetenv(&__fcsr);
return 0;
}
static __inline int fetestexcept(int __excepts) {
fexcept_t __FCSR;
fegetenv(&__FCSR);
return (__FCSR & __excepts & FE_ALL_EXCEPT);
}
static __inline int fegetround(void) {
fenv_t _fcsr;
fegetenv(&_fcsr);
return (_fcsr & _FCSR_RMASK);
}
static __inline int fesetround(int __round) {
fenv_t _fcsr;
fegetenv(&_fcsr);
_fcsr &= ~_FCSR_RMASK;
_fcsr |= (__round & _FCSR_RMASK ) ;
fesetenv(&_fcsr);
return 0;
}
static __inline int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FCSR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
static __inline int feupdateenv(const fenv_t* __envp) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
fesetenv(__envp);
feraiseexcept(__fcsr & FE_ALL_EXCEPT);
return 0;
}
#if __BSD_VISIBLE
static __inline int feenableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT;
fesetenv(&__new_fcsr);
return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fedisableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT);
fesetenv(&__new_fcsr);
return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
static __inline int fegetexcept(void) {
fenv_t __fcsr;
fegetenv(&__fcsr);
return ((__fcsr & _FCSR_ENABLE_MASK) >> _ENABLE_SHIFT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */

105
libm/include/mips/machine/fenv.h Normal file
View File

@ -0,0 +1,105 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
*/
/*
Rewritten for Android.
*/
/* MIPS FPU floating point control register bits.
*
* 31-25 -> floating point conditions code bits set by FP compare
* instructions
* 24 -> flush denormalized results to zero instead of
* causing unimplemented operation exception.
* 23 -> Condition bit
* 22 -> In conjunction with FS detects denormalized
* operands and replaces them internally with 0.
* 21 -> In conjunction with FS forces denormalized operands
* to the closest normalized value.
* 20-18 -> reserved (read as 0, write with 0)
* 17 -> cause bit for unimplemented operation
* 16 -> cause bit for invalid exception
* 15 -> cause bit for division by zero exception
* 14 -> cause bit for overflow exception
* 13 -> cause bit for underflow exception
* 12 -> cause bit for inexact exception
* 11 -> enable exception for invalid exception
* 10 -> enable exception for division by zero exception
* 9 -> enable exception for overflow exception
* 8 -> enable exception for underflow exception
* 7 -> enable exception for inexact exception
* 6 -> flag invalid exception
* 5 -> flag division by zero exception
* 4 -> flag overflow exception
* 3 -> flag underflow exception
* 2 -> flag inexact exception
* 1-0 -> rounding control
*
*
* Rounding Control:
* 00 - rounding to nearest (RN)
* 01 - rounding toward zero (RZ)
* 10 - rounding (up) toward plus infinity (RP)
* 11 - rounding (down)toward minus infinity (RM)
*/
#ifndef _MIPS_FENV_H_
#define _MIPS_FENV_H_
#include <sys/types.h>
__BEGIN_DECLS
typedef __uint32_t fenv_t;
typedef __uint32_t lfexcept_t;
/* Exception flags */
#define FE_INVALID 0x40
#define FE_DIVBYZERO 0x20
#define FE_OVERFLOW 0x10
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x04
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
#define _FCSR_CAUSE_SHIFT 10
#define _ENABLE_SHIFT 5
#define _FCSR_ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_TOWARDZERO 0x0001
#define FE_UPWARD 0x0002
#define FE_DOWNWARD 0x0003
#define _FCSR_RMODE_SHIFT 0
#define _FCSR_RMASK 0x3
__END_DECLS
#endif /* !_MIPS_FENV_H_ */

115
libm/mips/fenv.c
View File

@ -33,3 +33,118 @@
* this as a default environment.
*/
const fenv_t __fe_dfl_env = 0;
int fegetenv(fenv_t* __envp) {
fenv_t _fcsr = 0;
#ifdef __mips_hard_float
__asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
#endif
*__envp = _fcsr;
return 0;
}
int fesetenv(const fenv_t* __envp) {
fenv_t _fcsr = *__envp;
#ifdef __mips_hard_float
__asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
#endif
return 0;
}
int feclearexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT));
fesetenv(&__fcsr);
return 0;
}
int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
*__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
return 0;
}
int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~__excepts;
__fcsr |= *__flagp & __excepts;
fesetenv(&__fcsr);
return 0;
}
int feraiseexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
/* Cause bit needs to be set as well for generating the exception*/
__fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT);
fesetenv(&__fcsr);
return 0;
}
int fetestexcept(int __excepts) {
fexcept_t __FCSR;
fegetenv(&__FCSR);
return (__FCSR & __excepts & FE_ALL_EXCEPT);
}
int fegetround(void) {
fenv_t _fcsr;
fegetenv(&_fcsr);
return (_fcsr & _FCSR_RMASK);
}
int fesetround(int __round) {
fenv_t _fcsr;
fegetenv(&_fcsr);
_fcsr &= ~_FCSR_RMASK;
_fcsr |= (__round & _FCSR_RMASK ) ;
fesetenv(&_fcsr);
return 0;
}
int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _FCSR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
int feupdateenv(const fenv_t* __envp) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
fesetenv(__envp);
feraiseexcept(__fcsr & FE_ALL_EXCEPT);
return 0;
}
int feenableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT;
fesetenv(&__new_fcsr);
return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fedisableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT);
fesetenv(&__new_fcsr);
return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
int fegetexcept(void) {
fenv_t __fcsr;
fegetenv(&__fcsr);
return ((__fcsr & _FCSR_ENABLE_MASK) >> _ENABLE_SHIFT);
}