Add new optimized strlen for arm.
This optimized version is primarily targeted at cortex-a15. Tested on all nexus devices using the system/extras/libc_test strlen test. Tested alignments from 1 to 32 that are powers of 2. Tested that strlen does not cross page boundaries at all alignments. Speed improvements listed below: cortex-a15 - Sizes >= 32 bytes, ~75% improvement. - Sizes >= 1024 bytes, ~250% improvement. cortex-a9 - Sizes >= 32 bytes, ~75% improvement. - Sizes >= 1024 bytes, ~85% improvement. krait - Sizes >= 32 bytes, ~95% improvement. - Sizes >= 1024 bytes, ~160% improvement. Change-Id: I361b1a36ed89ab991f2a8f0abbf0d7416d39c8f5
This commit is contained in:
Christopher Ferris
129
libc/arch-arm/generic/bionic/strlen.c
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129
libc/arch-arm/generic/bionic/strlen.c
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@@ -0,0 +1,129 @@
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/*
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* Copyright (C) 2008 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <string.h>
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#include <stdint.h>
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#include <machine/cpu-features.h>
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size_t strlen(const char *s)
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{
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__builtin_prefetch(s);
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__builtin_prefetch(s+32);
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union {
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const char *b;
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const uint32_t *w;
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uintptr_t i;
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} u;
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// these are some scratch variables for the asm code below
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uint32_t v, t;
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// initialize the string length to zero
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size_t l = 0;
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// align the pointer to a 32-bit word boundary
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u.b = s;
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while (u.i & 0x3) {
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if (__builtin_expect(*u.b++ == 0, 0)) {
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goto done;
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}
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l++;
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}
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// loop for each word, testing if it contains a zero byte
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// if so, exit the loop and update the length.
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// We need to process 32 bytes per loop to schedule PLD properly
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// and achieve the maximum bus speed.
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asm(
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"ldr %[v], [%[s]], #4 \n"
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"sub %[l], %[l], %[s] \n"
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"0: \n"
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#if __ARM_HAVE_PLD
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"pld [%[s], #64] \n"
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#endif
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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#if !defined(__OPTIMIZE_SIZE__)
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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"bne 1f \n"
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"sub %[t], %[v], %[mask], lsr #7\n"
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"and %[t], %[t], %[mask] \n"
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"bics %[t], %[t], %[v] \n"
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"ldreq %[v], [%[s]], #4 \n"
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#endif
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"beq 0b \n"
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"1: \n"
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"add %[l], %[l], %[s] \n"
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"tst %[v], #0xFF \n"
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"beq 2f \n"
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"add %[l], %[l], #1 \n"
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"tst %[v], #0xFF00 \n"
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"beq 2f \n"
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"add %[l], %[l], #1 \n"
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"tst %[v], #0xFF0000 \n"
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"addne %[l], %[l], #1 \n"
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"2: \n"
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: [l]"=&r"(l), [v]"=&r"(v), [t]"=&r"(t), [s]"=&r"(u.b)
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: "%[l]"(l), "%[s]"(u.b), [mask]"r"(0x80808080UL)
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: "cc"
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);
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done:
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return l;
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}
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@@ -1,3 +1,4 @@
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$(call libc-add-cpu-variant-src,MEMCPY,arch-arm/generic/bionic/memcpy.S)
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$(call libc-add-cpu-variant-src,MEMSET,arch-arm/generic/bionic/memset.S)
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$(call libc-add-cpu-variant-src,STRCMP,arch-arm/generic/bionic/strcmp.S)
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$(call libc-add-cpu-variant-src,STRLEN,arch-arm/generic/bionic/strlen.c)
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