am b67ff7e3: am 734f0d64: Merge "Fix signal mask save/restore for arm64."
* commit 'b67ff7e37eac39bdbc06478a545b507462fdcee9': Fix signal mask save/restore for arm64.
This commit is contained in:
commit
2660970708
@ -32,7 +32,6 @@
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*/
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*/
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#include <private/bionic_asm.h>
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#include <private/bionic_asm.h>
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#include <machine/setjmp.h>
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// According to the ARM AAPCS document, we only need to save
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// According to the ARM AAPCS document, we only need to save
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// the following registers:
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// the following registers:
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@ -28,9 +28,6 @@
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#include <private/bionic_asm.h>
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#include <private/bionic_asm.h>
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// _JBLEN is the size of a jmp_buf in longs(64bit on AArch64).
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#define _JBLEN 32
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// According to AARCH64 PCS document we need to save the following
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// According to AARCH64 PCS document we need to save the following
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// registers:
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// registers:
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//
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//
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@ -40,32 +37,30 @@
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// NOTE: All the registers saved here will have 64bit vales (except FPSR).
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// NOTE: All the registers saved here will have 64bit vales (except FPSR).
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// AAPCS mandates that the higher part of q registers do not need to
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// AAPCS mandates that the higher part of q registers do not need to
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// be saved by the callee.
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// be saved by the callee.
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//
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// The structure of jmp_buf for AArch64:
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// The structure of jmp_buf for AArch64:
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//
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//
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// NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
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// NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
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// below computes the offsets in words(32bit).
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// below computes the offsets in words(32bit).
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//
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//
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// word name description
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// word name description
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// 0 magic magic number
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// -------------------------------------------------------------------------
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// 1 sigmask signal mask (not used with _setjmp / _longjmp)
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// 0-1 sigmask signal mask (not used with _setjmp / _longjmp)
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// 2 core_base base of core registers (x19-x30, sp)
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// 2 core_base base of core registers (x19-x30, sp)
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// 28 float_base base of float registers (d8-d15)
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// 28 float_base base of float registers (d8-d15)
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// 44 reserved reserved entries (room to grow)
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// 44 magic magic number
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// 45- reserved reserved entries (room to grow)
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// 64
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// 64
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//
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//
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//
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// NOTE: The instructions that load/store core/vfp registers expect 8-byte
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// NOTE: The instructions that load/store core/vfp registers expect 8-byte
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// alignment. Contrary to the previous setjmp header for ARM we do not
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// alignment. Contrary to the previous setjmp header for ARM we do not
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// need to save status/control registers for VFP (it is not a
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// need to save status/control registers for VFP (it is not a
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// requirement for setjmp).
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// requirement for setjmp).
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//
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#define _JB_MAGIC 0
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#define _JB_SIGMASK 0
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#define _JB_SIGMASK (_JB_MAGIC+1)
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#define _JB_CORE_BASE (_JB_SIGMASK + 2)
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#define _JB_CORE_BASE (_JB_SIGMASK+1)
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#define _JB_FLOAT_BASE (_JB_CORE_BASE + (31-19+1)*2)
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#define _JB_FLOAT_BASE (_JB_CORE_BASE + (31-19+1)*2)
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#define _JB_MAGIC (_JB_FLOAT_BASE + 16*2)
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.L_setjmp_magic_signal_mask_n: .word 0x53657200
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.L_setjmp_magic_signal_mask_n: .word 0x53657200
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.L_setjmp_magic_signal_mask_y: .word 0x53657201
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.L_setjmp_magic_signal_mask_y: .word 0x53657201
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@ -86,16 +81,14 @@ ENTRY(sigsetjmp)
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ldr w9, .L_setjmp_magic_signal_mask_n
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ldr w9, .L_setjmp_magic_signal_mask_n
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cbz w1, 1f
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cbz w1, 1f
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// Get current signal mask.
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// Save current signal mask.
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stp x0, x30, [sp, #-16]!
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stp x0, x30, [sp, #-16]!
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mov x0, xzr
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// The 'how' argument is ignored if new_mask is NULL.
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bl sigblock
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mov x1, #0 // NULL.
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mov w1, w0
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add x2, x0, #(_JB_SIGMASK * 4) // old_mask.
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bl sigprocmask
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ldp x0, x30, [sp], #16
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ldp x0, x30, [sp], #16
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// Save signal mask.
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str w1, [x0, #(_JB_SIGMASK * 4)]
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ldr w9, .L_setjmp_magic_signal_mask_y
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ldr w9, .L_setjmp_magic_signal_mask_y
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1:
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1:
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@ -135,11 +128,14 @@ ENTRY(siglongjmp)
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// Restore signal mask.
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// Restore signal mask.
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stp x0, x30, [sp, #-16]!
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stp x0, x30, [sp, #-16]!
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mov x19, x1
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mov x19, x1 // Save 'value'.
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ldr w0, [x0, #(_JB_SIGMASK * 4)]
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mov x2, x0
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bl sigsetmask
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mov x0, #2 // SIG_SETMASK
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add x1, x2, #(_JB_SIGMASK * 4) // new_mask.
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mov x2, #0 // NULL.
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bl sigprocmask
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mov x1, x19 // Restore 'value'.
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ldp x0, x30, [sp], #16
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ldp x0, x30, [sp], #16
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mov x1, x19
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1:
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1:
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// Restore core registers.
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// Restore core registers.
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