264 lines
9.7 KiB
C
264 lines
9.7 KiB
C
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/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __ASM_ASM_H
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#define __ASM_ASM_H
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#include <asm/sgidefs.h>
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#ifndef CAT
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#ifdef __STDC__
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#define __CAT(str1, str2) str1##str2
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#else
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#define __CAT(str1, str2) str1 str2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#define CAT(str1, str2) __CAT(str1, str2)
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#endif
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#ifdef __PIC__
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CPRESTORE(register) .cprestore register
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#define CPADD(register) .cpadd register
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#define CPLOAD(register) .cpload register
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#else
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CPRESTORE(register)
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#define CPADD(register)
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#define CPLOAD(register)
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LEAF(symbol) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, 0, ra
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#define NESTED(symbol, framesize, rpc) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, framesize, rpc
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#define END(function) .end function; .size function, .-function
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#define EXPORT(symbol) .globl symbol; symbol:
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define FEXPORT(symbol) .globl symbol; .type symbol, @function; symbol:
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#define ABS(symbol,value) .globl symbol; symbol = value
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#define PANIC(msg) .set push; .set reorder; PTR_LA a0, 8f; jal panic; 9: b 9b; .set pop; TEXT(msg)
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#define PRINT(string)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define TEXT(msg) .pushsection .data; 8: .asciiz msg; .popsection;
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#define TTABLE(string) .pushsection .text; .word 1f; .popsection .pushsection .data; 1: .asciiz string; .popsection
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#define PREF(hint, addr)
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#define PREFX(hint, addr)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#if _MIPS_ISA == _MIPS_ISA_MIPS1
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#define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
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#define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9:
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#if _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS3
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#define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9:
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#define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9:
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#if _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS5 || _MIPS_ISA == _MIPS_ISA_MIPS32 || _MIPS_ISA == _MIPS_ISA_MIPS64
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#define MOVN(rd, rs, rt) movn rd, rs, rt
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#define MOVZ(rd, rs, rt) movz rd, rs, rt
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#if _MIPS_SIM == _MIPS_SIM_ABI32
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#define ALSZ 7
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#define ALMASK ~7
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64
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#define ALSZ 15
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#define ALMASK ~15
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#ifdef __mips64
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#define SZREG 8
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#else
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#define SZREG 4
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SIM == _MIPS_SIM_ABI32
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#define REG_S sw
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#define REG_L lw
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define REG_SUBU subu
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#define REG_ADDU addu
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#endif
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#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define REG_S sd
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#define REG_L ld
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#define REG_SUBU dsubu
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#define REG_ADDU daddu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SZINT == 32
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#define INT_ADD add
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#define INT_ADDU addu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_ADDI addi
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#define INT_ADDIU addiu
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#define INT_SUB sub
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#define INT_SUBU subu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_L lw
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#define INT_S sw
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#define INT_SLL sll
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#define INT_SLLV sllv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_SRL srl
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#define INT_SRLV srlv
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#define INT_SRA sra
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#define INT_SRAV srav
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SZINT == 64
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#define INT_ADD dadd
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#define INT_ADDU daddu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_ADDI daddi
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#define INT_ADDIU daddiu
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#define INT_SUB dsub
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#define INT_SUBU dsubu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_L ld
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#define INT_S sd
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#define INT_SLL dsll
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#define INT_SLLV dsllv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT_SRL dsrl
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#define INT_SRLV dsrlv
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#define INT_SRA dsra
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#define INT_SRAV dsrav
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SZLONG == 32
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#define LONG_ADD add
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#define LONG_ADDU addu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_ADDI addi
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#define LONG_ADDIU addiu
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#define LONG_SUB sub
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#define LONG_SUBU subu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_L lw
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#define LONG_S sw
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#define LONG_SLL sll
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#define LONG_SLLV sllv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_SRL srl
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#define LONG_SRLV srlv
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#define LONG_SRA sra
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#define LONG_SRAV srav
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG .word
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#define LONGSIZE 4
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#define LONGMASK 3
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#define LONGLOG 2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SZLONG == 64
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#define LONG_ADD dadd
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#define LONG_ADDU daddu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_ADDI daddi
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#define LONG_ADDIU daddiu
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#define LONG_SUB dsub
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#define LONG_SUBU dsubu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_L ld
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#define LONG_S sd
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#define LONG_SLL dsll
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#define LONG_SLLV dsllv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG_SRL dsrl
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#define LONG_SRLV dsrlv
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#define LONG_SRA dsra
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#define LONG_SRAV dsrav
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define LONG .dword
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#define LONGSIZE 8
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#define LONGMASK 7
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#define LONGLOG 3
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SZPTR == 32
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#define PTR_ADD add
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#define PTR_ADDU addu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_ADDI addi
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#define PTR_ADDIU addiu
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#define PTR_SUB sub
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#define PTR_SUBU subu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_L lw
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#define PTR_S sw
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#define PTR_LA la
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#define PTR_LI li
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_SLL sll
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#define PTR_SLLV sllv
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#define PTR_SRL srl
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#define PTR_SRLV srlv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_SRA sra
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#define PTR_SRAV srav
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#define PTR_SCALESHIFT 2
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#define PTR .word
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTRSIZE 4
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#define PTRLOG 2
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#endif
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#if _MIPS_SZPTR == 64
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_ADD dadd
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#define PTR_ADDU daddu
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#define PTR_ADDI daddi
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#define PTR_ADDIU daddiu
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_SUB dsub
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#define PTR_SUBU dsubu
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#define PTR_L ld
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#define PTR_S sd
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_LA dla
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#define PTR_LI dli
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#define PTR_SLL dsll
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#define PTR_SLLV dsllv
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_SRL dsrl
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#define PTR_SRLV dsrlv
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#define PTR_SRA dsra
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#define PTR_SRAV dsrav
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PTR_SCALESHIFT 3
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#define PTR .dword
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#define PTRSIZE 8
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#define PTRLOG 3
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SIM == _MIPS_SIM_ABI32
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#define MFC0 mfc0
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#define MTC0 mtc0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64
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#define MFC0 dmfc0
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#define MTC0 dmtc0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#define SSNOP sll zero, zero, 1
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#define R10KCBARRIER(addr)
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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