262 lines
10 KiB
C
262 lines
10 KiB
C
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/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef _I810_DRM_H_
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#define _I810_DRM_H_
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#ifndef _I810_DEFINES_
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#define _I810_DEFINES_
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_DMA_BUF_ORDER 12
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#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
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#define I810_DMA_BUF_NR 256
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#define I810_NR_SAREA_CLIPRECTS 8
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_NR_TEX_REGIONS 64
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#define I810_LOG_MIN_TEX_REGION_SIZE 16
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#endif
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#define I810_UPLOAD_TEX0IMAGE 0x1
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_UPLOAD_TEX1IMAGE 0x2
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#define I810_UPLOAD_CTX 0x4
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#define I810_UPLOAD_BUFFERS 0x8
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#define I810_UPLOAD_TEX0 0x10
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_UPLOAD_TEX1 0x20
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#define I810_UPLOAD_CLIPRECTS 0x40
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#define I810_DESTREG_DI0 0
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#define I810_DESTREG_DI1 1
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_DESTREG_DV0 2
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#define I810_DESTREG_DV1 3
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#define I810_DESTREG_DR0 4
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#define I810_DESTREG_DR1 5
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_DESTREG_DR2 6
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#define I810_DESTREG_DR3 7
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#define I810_DESTREG_DR4 8
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#define I810_DEST_SETUP_SIZE 10
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTXREG_CF0 0
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#define I810_CTXREG_CF1 1
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#define I810_CTXREG_ST0 2
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#define I810_CTXREG_ST1 3
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTXREG_VF 4
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#define I810_CTXREG_MT 5
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#define I810_CTXREG_MC0 6
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#define I810_CTXREG_MC1 7
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTXREG_MC2 8
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#define I810_CTXREG_MA0 9
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#define I810_CTXREG_MA1 10
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#define I810_CTXREG_MA2 11
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTXREG_SDM 12
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#define I810_CTXREG_FOG 13
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#define I810_CTXREG_B1 14
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#define I810_CTXREG_B2 15
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTXREG_LCS 16
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#define I810_CTXREG_PV 17
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#define I810_CTXREG_ZA 18
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#define I810_CTXREG_AA 19
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_CTX_SETUP_SIZE 20
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#define I810_TEXREG_MI0 0
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#define I810_TEXREG_MI1 1
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#define I810_TEXREG_MI2 2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_TEXREG_MI3 3
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#define I810_TEXREG_MF 4
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#define I810_TEXREG_MLC 5
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#define I810_TEXREG_MLL 6
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_TEXREG_MCS 7
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#define I810_TEX_SETUP_SIZE 8
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#define I810_FRONT 0x1
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#define I810_BACK 0x2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define I810_DEPTH 0x4
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typedef enum _drm_i810_init_func {
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I810_INIT_DMA = 0x01,
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I810_CLEANUP_DMA = 0x02,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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I810_INIT_DMA_1_4 = 0x03
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} drm_i810_init_func_t;
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typedef struct _drm_i810_init {
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drm_i810_init_func_t func;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int mmio_offset;
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unsigned int buffers_offset;
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int sarea_priv_offset;
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unsigned int ring_start;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int ring_end;
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unsigned int ring_size;
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unsigned int front_offset;
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unsigned int back_offset;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int depth_offset;
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unsigned int overlay_offset;
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unsigned int overlay_physical;
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unsigned int w;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int h;
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unsigned int pitch;
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unsigned int pitch_bits;
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} drm_i810_init_t;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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typedef struct _drm_i810_pre12_init {
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drm_i810_init_func_t func;
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unsigned int mmio_offset;
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unsigned int buffers_offset;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int sarea_priv_offset;
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unsigned int ring_start;
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unsigned int ring_end;
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unsigned int ring_size;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int front_offset;
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unsigned int back_offset;
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unsigned int depth_offset;
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unsigned int w;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int h;
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unsigned int pitch;
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unsigned int pitch_bits;
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} drm_i810_pre12_init_t;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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typedef struct _drm_i810_tex_region {
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unsigned char next, prev;
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unsigned char in_use;
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int age;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} drm_i810_tex_region_t;
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typedef struct _drm_i810_sarea {
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unsigned int ContextState[I810_CTX_SETUP_SIZE];
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unsigned int BufferState[I810_DEST_SETUP_SIZE];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int TexState[2][I810_TEX_SETUP_SIZE];
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unsigned int dirty;
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unsigned int nbox;
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struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
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int texAge;
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int last_enqueue;
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int last_dispatch;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int last_quiescent;
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int ctxOwner;
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int vertex_prim;
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int pf_enabled;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int pf_active;
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int pf_current_page;
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} drm_i810_sarea_t;
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#define DRM_I810_INIT 0x00
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_I810_VERTEX 0x01
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#define DRM_I810_CLEAR 0x02
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#define DRM_I810_FLUSH 0x03
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#define DRM_I810_GETAGE 0x04
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_I810_GETBUF 0x05
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#define DRM_I810_SWAP 0x06
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#define DRM_I810_COPY 0x07
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#define DRM_I810_DOCOPY 0x08
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_I810_OV0INFO 0x09
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#define DRM_I810_FSTATUS 0x0a
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#define DRM_I810_OV0FLIP 0x0b
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#define DRM_I810_MC 0x0c
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_I810_RSTATUS 0x0d
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#define DRM_I810_FLIP 0x0e
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#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
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#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
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#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH)
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#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE)
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#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP)
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#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
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#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
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#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
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#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
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#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
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#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP)
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typedef struct _drm_i810_clear {
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int clear_color;
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int clear_depth;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int flags;
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} drm_i810_clear_t;
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typedef struct _drm_i810_vertex {
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int idx;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int used;
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int discard;
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} drm_i810_vertex_t;
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typedef struct _drm_i810_copy_t {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int idx;
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int used;
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void *address;
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} drm_i810_copy_t;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PR_TRIANGLES (0x0<<18)
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#define PR_TRISTRIP_0 (0x1<<18)
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#define PR_TRISTRIP_1 (0x2<<18)
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#define PR_TRIFAN (0x3<<18)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PR_POLYGON (0x4<<18)
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#define PR_LINES (0x5<<18)
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#define PR_LINESTRIP (0x6<<18)
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#define PR_RECTS (0x7<<18)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define PR_MASK (0x7<<18)
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typedef struct drm_i810_dma {
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void *virtual;
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int request_idx;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int request_size;
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int granted;
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} drm_i810_dma_t;
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typedef struct _drm_i810_overlay_t {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int offset;
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unsigned int physical;
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} drm_i810_overlay_t;
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typedef struct _drm_i810_mc {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int idx;
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int used;
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int num_blocks;
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int *length;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int last_render;
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} drm_i810_mc_t;
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#endif
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