76 lines
3.2 KiB
C
76 lines
3.2 KiB
C
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/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef _ASM_WAR_H
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#define _ASM_WAR_H
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#include <war.h>
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#define R4000_WAR 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define R4400_WAR 0
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#define DADDI_WAR 0
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#ifndef R4600_V1_INDEX_ICACHEOP_WAR
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#error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#ifndef R4600_V1_HIT_CACHEOP_WAR
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#error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#ifndef R4600_V2_HIT_CACHEOP_WAR
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#error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform
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#endif
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#ifndef R5432_CP0_INTERRUPT_WAR
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#error Check setting of R5432_CP0_INTERRUPT_WAR for your platform
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#endif
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#ifndef BCM1250_M3_WAR
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#error Check setting of BCM1250_M3_WAR for your platform
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#ifndef SIBYTE_1956_WAR
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#error Check setting of SIBYTE_1956_WAR for your platform
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#ifndef MIPS4K_ICACHE_REFILL_WAR
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#error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform
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#endif
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#ifndef MIPS_CACHE_SYNC_WAR
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#error Check setting of MIPS_CACHE_SYNC_WAR for your platform
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#endif
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#ifndef TX49XX_ICACHE_INDEX_INV_WAR
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#error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#ifndef RM9000_CDEX_SMP_WAR
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#error Check setting of RM9000_CDEX_SMP_WAR for your platform
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#ifndef ICACHE_REFILLS_WORKAROUND_WAR
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#error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform
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#endif
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#ifndef R10000_LLSC_WAR
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#error Check setting of R10000_LLSC_WAR for your platform
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#endif
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#ifndef MIPS34K_MISSED_ITLB_WAR
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#error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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#endif
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