61 lines
2.8 KiB
C
61 lines
2.8 KiB
C
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/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __ASM_MIPS_BOARDS_MALTA_H
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#define __ASM_MIPS_BOARDS_MALTA_H
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#include <asm/addrspace.h>
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#include <asm/io.h>
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#include <asm/mips-boards/msc01_pci.h>
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#include <asm/gt64120.h>
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#define MIPS_MSC01_IC_REG_BASE 0x1bc40000
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#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS)
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#define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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#define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL)
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#define GCMP_BASE_ADDR 0x1fbf8000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define GCMP_ADDRSPACE_SZ (256 * 1024)
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#define GIC_BASE_ADDR 0x1bdc0000
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#define GIC_ADDRSPACE_SZ (128 * 1024)
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#define MSC01_BIU_REG_BASE 0x1bc80000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MSC01_BIU_ADDRSPACE_SZ (256 * 1024)
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#define MSC01_SC_CFG_OFS 0x0110
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#define MSC01_SC_CFG_GICPRES_MSK 0x00000004
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#define MSC01_SC_CFG_GICPRES_SHF 2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MSC01_SC_CFG_GICENA_SHF 3
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#define MALTA_RTC_ADR_REG 0x70
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#define MALTA_RTC_DAT_REG 0x71
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#define SMSC_CONFIG_REG 0x3f0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SMSC_DATA_REG 0x3f1
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#define SMSC_CONFIG_DEVNUM 0x7
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#define SMSC_CONFIG_ACTIVATE 0x30
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#define SMSC_CONFIG_ENTER 0x55
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SMSC_CONFIG_EXIT 0xaa
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#define SMSC_CONFIG_DEVNUM_FLOPPY 0
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#define SMSC_CONFIG_ACTIVATE_ENABLE 1
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#define SMSC_WRITE(x, a) outb(x, a)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MALTA_JMPRS_REG 0x1f000210
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#endif
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