2012-03-27 20:37:17 +02:00
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/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __ASM_MIPS_DEC_IOASIC_ADDRS_H
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#define __ASM_MIPS_DEC_IOASIC_ADDRS_H
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#define IOASIC_SLOT_SIZE 0x00040000
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2013-01-30 03:15:55 +01:00
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#define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE)
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#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE)
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#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE)
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#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE)
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#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE)
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#define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE)
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#define IOASIC_TOY (8*IOASIC_SLOT_SIZE)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE)
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#define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE)
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#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE)
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#define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IOASIC_MCR (11*IOASIC_SLOT_SIZE)
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#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE)
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#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE)
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#define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE)
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#define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE)
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#define IO_REG_SCSI_DMA_P 0x00
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#define IO_REG_SCSI_DMA_BP 0x10
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_LANCE_DMA_P 0x20
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#define IO_REG_SCC0A_T_DMA_P 0x30
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#define IO_REG_SCC0A_R_DMA_P 0x40
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#define IO_REG_SCC1A_T_DMA_P 0x50
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_SCC1A_R_DMA_P 0x60
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#define IO_REG_AB_T_DMA_P 0x50
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#define IO_REG_AB_R_DMA_P 0x60
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#define IO_REG_FLOPPY_DMA_P 0x70
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_ISDN_T_DMA_P 0x80
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#define IO_REG_ISDN_T_DMA_BP 0x90
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#define IO_REG_ISDN_R_DMA_P 0xa0
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#define IO_REG_ISDN_R_DMA_BP 0xb0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_DATA_0 0xc0
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#define IO_REG_DATA_1 0xd0
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#define IO_REG_DATA_2 0xe0
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#define IO_REG_DATA_3 0xf0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_SSR 0x100
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#define IO_REG_SIR 0x110
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#define IO_REG_SIMR 0x120
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#define IO_REG_SAR 0x130
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_ISDN_T_DATA 0x140
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#define IO_REG_ISDN_R_DATA 0x150
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#define IO_REG_LANCE_SLOT 0x160
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#define IO_REG_SCSI_SLOT 0x170
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_SCC0A_SLOT 0x180
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#define IO_REG_SCC1A_SLOT 0x190
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#define IO_REG_AB_SLOT 0x190
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#define IO_REG_FLOPPY_SLOT 0x1a0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_SCSI_SCR 0x1b0
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#define IO_REG_SCSI_SDR0 0x1c0
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#define IO_REG_SCSI_SDR1 0x1d0
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#define IO_REG_FCTR 0x1e0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_REG_RES_31 0x1f0
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#define IO_SSR_SCC0A_TX_DMA_EN (1<<31)
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#define IO_SSR_SCC0A_RX_DMA_EN (1<<30)
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#define IO_SSR_RES_27 (1<<27)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_SSR_RES_26 (1<<26)
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#define IO_SSR_RES_25 (1<<25)
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#define IO_SSR_RES_24 (1<<24)
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#define IO_SSR_RES_23 (1<<23)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_SSR_SCSI_DMA_DIR (1<<18)
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#define IO_SSR_SCSI_DMA_EN (1<<17)
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#define IO_SSR_LANCE_DMA_EN (1<<16)
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#define IO_SSR_SCC1A_TX_DMA_EN (1<<29)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_SSR_SCC1A_RX_DMA_EN (1<<28)
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#define IO_SSR_RES_22 (1<<22)
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#define IO_SSR_RES_21 (1<<21)
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#define IO_SSR_RES_20 (1<<20)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_SSR_RES_19 (1<<19)
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#define IO_SSR_AB_TX_DMA_EN (1<<29)
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#define IO_SSR_AB_RX_DMA_EN (1<<28)
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#define IO_SSR_FLOPPY_DMA_DIR (1<<22)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IO_SSR_FLOPPY_DMA_EN (1<<21)
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#define IO_SSR_ISDN_TX_DMA_EN (1<<20)
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#define IO_SSR_ISDN_RX_DMA_EN (1<<19)
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#define KN0X_IO_SSR_DIAGDN (1<<15)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KN0X_IO_SSR_SCC_RST (1<<11)
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#define KN0X_IO_SSR_RTC_RST (1<<10)
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#define KN0X_IO_SSR_ASC_RST (1<<9)
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#define KN0X_IO_SSR_LANCE_RST (1<<8)
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2012-03-27 20:37:17 +02:00
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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