559 lines
13 KiB
Plaintext
559 lines
13 KiB
Plaintext
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "imx7d.dtsi"
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/ {
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model = "Freescale i.MX7 DDR3 12x12 ARM2 Board";
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compatible = "fsl,imx7d-12x12-ddr3-arm2", "fsl,imx7d";
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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status = "okay";
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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volume-up {
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label = "Volume Up";
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gpios = <&gpio3 17 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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pxp_v4l2_out {
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compatible = "fsl,imx7d-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
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status = "okay";
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_sd3_vmmc: sd3_vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VCC_SD3";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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gpio = <&gpio6 11 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg1_vbus: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "usb_otg2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vref_1v8: regulator@2 {
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compatible = "regulator-fixed";
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regulator-name = "vref-1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reg_can1_3v3: can1-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "can1-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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reg_can2_3v3: can2-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "can2-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
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};
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};
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memory {
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reg = <0x80000000 0x80000000>;
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};
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};
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&adc1 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&cpu0 {
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arm-supply = <&sw1a_reg>;
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};
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&ecspi4 {
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fsl,spi-num-chipselects = <4>;
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cs-gpios = <&gpio5 3 0>, <&gpio5 4 0>, <&gpio5 5 0>, <&gpio5 6 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi4_1 &pinctrl_ecspi4_cs_1>;
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status = "disabled";
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,m25p32";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&epxp {
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status = "okay";
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_can1_3v3>;
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status = "disabled";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_can2_3v3>;
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status = "disabled";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_1>;
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status = "okay";
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pmic: pfuze3000@08 {
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compatible = "fsl,pfuze3000";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1a {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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/* use sw1c_reg to align with pfuze100/pfuze200 */
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sw1c_reg: sw1b {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1475000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen2_reg: vldo2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vccsd {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen4_reg: v33 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vldo3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3_1>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog_1>;
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imx7d-12x12-ddr3-arm2 {
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pinctrl_hog_1: hoggrp-1 {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x59
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MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x59
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MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x59
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>;
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};
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pinctrl_ecspi4_cs_1: ecspi4_cs_grp-1 {
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fsl,pins = <
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MX7D_PAD_SD1_CLK__GPIO5_IO3 0x2
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MX7D_PAD_SD1_CMD__GPIO5_IO4 0x2
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MX7D_PAD_SD1_DATA0__GPIO5_IO5 0x2
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MX7D_PAD_SD1_DATA1__GPIO5_IO6 0x2
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>;
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};
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pinctrl_ecspi4_1: ecspi4grp-1 {
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fsl,pins = <
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MX7D_PAD_SD1_RESET_B__ECSPI4_SCLK 0x2
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MX7D_PAD_SD1_WP__ECSPI4_MOSI 0x2
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MX7D_PAD_SD1_CD_B__ECSPI4_MISO 0x2
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX7D_PAD_SD3_DATA5__FLEXCAN1_TX 0x59
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MX7D_PAD_SD3_DATA7__FLEXCAN1_RX 0x59
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX7D_PAD_SD3_DATA6__FLEXCAN2_TX 0x59
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MX7D_PAD_SD3_DATA4__FLEXCAN2_RX 0x59
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>;
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};
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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MX7D_PAD_LCD_DATA12__GPIO3_IO17 0x32
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MX7D_PAD_LCD_DATA13__GPIO3_IO18 0x32
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>;
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};
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pinctrl_i2c3_1: i2c3grp-1 {
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fsl,pins = <
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MX7D_PAD_ENET1_RGMII_RD0__I2C3_SCL 0x4000007f
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MX7D_PAD_ENET1_RGMII_RD1__I2C3_SDA 0x4000007f
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>;
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};
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pinctrl_i2c4_1: i2c4grp-1 {
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fsl,pins = <
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MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
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MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f
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>;
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};
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pinctrl_lcdif_dat: lcdifdatgrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA00__LCD_DATA0 0x4001b0b0
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MX7D_PAD_EPDC_DATA01__LCD_DATA1 0x4001b0b0
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MX7D_PAD_EPDC_DATA02__LCD_DATA2 0x4001b0b0
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MX7D_PAD_EPDC_DATA03__LCD_DATA3 0x4001b0b0
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MX7D_PAD_EPDC_DATA04__LCD_DATA4 0x4001b0b0
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MX7D_PAD_EPDC_DATA05__LCD_DATA5 0x4001b0b0
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MX7D_PAD_EPDC_DATA06__LCD_DATA6 0x4001b0b0
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MX7D_PAD_EPDC_DATA07__LCD_DATA7 0x4001b0b0
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MX7D_PAD_EPDC_DATA08__LCD_DATA8 0x4001b0b0
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MX7D_PAD_EPDC_DATA09__LCD_DATA9 0x4001b0b0
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MX7D_PAD_EPDC_DATA10__LCD_DATA10 0x4001b0b0
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MX7D_PAD_EPDC_DATA11__LCD_DATA11 0x4001b0b0
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MX7D_PAD_EPDC_DATA12__LCD_DATA12 0x4001b0b0
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MX7D_PAD_EPDC_DATA13__LCD_DATA13 0x4001b0b0
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MX7D_PAD_EPDC_DATA14__LCD_DATA14 0x4001b0b0
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MX7D_PAD_EPDC_DATA15__LCD_DATA15 0x4001b0b0
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MX7D_PAD_EPDC_SDLE__LCD_DATA16 0x4001b0b0
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MX7D_PAD_EPDC_SDOE__LCD_DATA17 0x4001b0b0
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MX7D_PAD_EPDC_SDSHR__LCD_DATA18 0x4001b0b0
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MX7D_PAD_EPDC_SDCE0__LCD_DATA19 0x4001b0b0
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MX7D_PAD_EPDC_SDCE1__LCD_DATA20 0x4001b0b0
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MX7D_PAD_EPDC_SDCE2__LCD_DATA21 0x4001b0b0
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MX7D_PAD_EPDC_SDCE3__LCD_DATA22 0x4001b0b0
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MX7D_PAD_EPDC_GDCLK__LCD_DATA23 0x4001b0b0
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>;
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};
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pinctrl_lcdif_ctrl: lcdifctrlgrp {
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fsl,pins = <
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MX7D_PAD_EPDC_SDCLK__LCD_CLK 0x4001b0b0
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MX7D_PAD_EPDC_BDR1__LCD_ENABLE 0x4001b0b0
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MX7D_PAD_EPDC_PWR_STAT__LCD_VSYNC 0x4001b0b0
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MX7D_PAD_EPDC_PWR_COM__LCD_HSYNC 0x4001b0b0
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x110b0
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>;
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};
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pinctrl_uart1_1: uart1grp-1 {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
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>;
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};
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pinctrl_usdhc2_1: usdhc2grp-1 {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x59
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MX7D_PAD_SD2_CLK__SD2_CLK 0x19
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
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MX7D_PAD_ECSPI1_SCLK__SD2_DATA4 0x59
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MX7D_PAD_ECSPI1_MOSI__SD2_DATA5 0x59
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MX7D_PAD_ECSPI1_MISO__SD2_DATA6 0x59
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MX7D_PAD_ECSPI1_SS0__SD2_DATA7 0x59
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>;
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};
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pinctrl_usdhc2_1_100mhz: usdhc2grp-1_100mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
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MX7D_PAD_ECSPI1_SCLK__SD2_DATA4 0x5a
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MX7D_PAD_ECSPI1_MOSI__SD2_DATA5 0x5a
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MX7D_PAD_ECSPI1_MISO__SD2_DATA6 0x5a
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MX7D_PAD_ECSPI1_SS0__SD2_DATA7 0x5a
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>;
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};
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pinctrl_usdhc2_1_200mhz: usdhc2grp-1_200mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
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MX7D_PAD_ECSPI1_SCLK__SD2_DATA4 0x5b
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MX7D_PAD_ECSPI1_MOSI__SD2_DATA5 0x5b
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MX7D_PAD_ECSPI1_MISO__SD2_DATA6 0x5b
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MX7D_PAD_ECSPI1_SS0__SD2_DATA7 0x5b
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>;
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};
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pinctrl_usdhc3_1: usdhc3grp-1 {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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>;
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};
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};
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};
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&iomuxc_lpsr {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog_2>;
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imx7d-12x12-ddr3-arm2 {
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pinctrl_hog_2: hoggrp-2 {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO02__GPIO1_IO2 0x59 /* flexcan stby1 */
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MX7D_PAD_GPIO1_IO03__GPIO1_IO3 0x59 /* flexcan stby2 */
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MX7D_PAD_GPIO1_IO01__ANATOP_24M_OUT 0x80000000
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>;
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};
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pinctrl_i2c1_1: i2c1grp-1 {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
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MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x4000007f
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>;
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};
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pinctrl_i2c2_1: i2c2grp-1 {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x4000007f
|
|
MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x4000007f
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&lcdif {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_lcdif_dat
|
|
&pinctrl_lcdif_ctrl>;
|
|
display = <&display0>;
|
|
status = "okay";
|
|
|
|
display0: display {
|
|
bits-per-pixel = <16>;
|
|
bus-width = <24>;
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
timing0: timing0 {
|
|
clock-frequency = <33500000>;
|
|
hactive = <800>;
|
|
vactive = <480>;
|
|
hback-porch = <89>;
|
|
hfront-porch = <164>;
|
|
vback-porch = <23>;
|
|
vfront-porch = <10>;
|
|
hsync-len = <10>;
|
|
vsync-len = <10>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <1>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&sdma {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
pinctrl-names = "default";
|
|
status = "disabled";
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1_1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg1 {
|
|
vbus-supply = <®_usb_otg1_vbus>;
|
|
srp-disable;
|
|
hnp-disable;
|
|
adp-disable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg2 {
|
|
vbus-supply = <®_usb_otg2_vbus>;
|
|
srp-disable;
|
|
hnp-disable;
|
|
adp-disable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc2_1>;
|
|
pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
|
|
assigned-clocks = <&clks IMX7D_USDHC2_ROOT_CLK>;
|
|
assigned-clocks-rates = <400000000>;
|
|
bus-width = <8>;
|
|
tuning-step = <2>;
|
|
non-removable;
|
|
keep-power-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3_1>;
|
|
vmmc-supply = <®_sd3_vmmc>;
|
|
cd-gpios = <&gpio1 14>;
|
|
wp-gpios = <&gpio1 15>;
|
|
keep-power-in-suspend;
|
|
enable-sdio-wakeup;
|
|
no-1-8-v;
|
|
status = "okay";
|
|
};
|