321 lines
8.3 KiB
C
Executable File
321 lines
8.3 KiB
C
Executable File
/*
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* Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/can/platform/flexcan.h>
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#include <linux/gpio.h>
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#include <linux/irqchip.h>
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#include <linux/of_address.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/pm_opp.h>
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#include <linux/fec.h>
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#include <linux/netdevice.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "cpuidle.h"
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static struct fec_platform_data fec_pdata[2];
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static struct flexcan_platform_data flexcan_pdata[2];
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static int flexcan_en_gpio;
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static int flexcan_en_active_high;
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static int flexcan_stby_gpio;
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static int flexcan_stby_active_high;
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static int flexcan0_en;
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static int flexcan1_en;
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static void imx6sx_fec1_sleep_enable(int enabled)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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if (enabled)
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regmap_update_bits(gpr, IOMUXC_GPR4,
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IMX6SX_GPR4_FEC_ENET1_STOP_REQ,
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IMX6SX_GPR4_FEC_ENET1_STOP_REQ);
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else
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regmap_update_bits(gpr, IOMUXC_GPR4,
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IMX6SX_GPR4_FEC_ENET1_STOP_REQ, 0);
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} else
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pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
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}
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static void imx6sx_fec2_sleep_enable(int enabled)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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if (enabled)
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regmap_update_bits(gpr, IOMUXC_GPR4,
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IMX6SX_GPR4_FEC_ENET2_STOP_REQ,
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IMX6SX_GPR4_FEC_ENET2_STOP_REQ);
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else
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regmap_update_bits(gpr, IOMUXC_GPR4,
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IMX6SX_GPR4_FEC_ENET2_STOP_REQ, 0);
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} else
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pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
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}
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static void __init imx6sx_enet_plt_init(void)
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{
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struct device_node *np;
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np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@02188000");
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if (np && of_get_property(np, "fsl,magic-packet", NULL))
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fec_pdata[0].sleep_mode_enable = imx6sx_fec1_sleep_enable;
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np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@021b4000");
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if (np && of_get_property(np, "fsl,magic-packet", NULL))
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fec_pdata[1].sleep_mode_enable = imx6sx_fec2_sleep_enable;
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}
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static void mx6sx_flexcan_switch(void)
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{
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if (flexcan0_en || flexcan1_en) {
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gpio_set_value_cansleep(flexcan_en_gpio,
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!flexcan_en_active_high);
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gpio_set_value_cansleep(flexcan_stby_gpio,
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!flexcan_stby_active_high);
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gpio_set_value_cansleep(flexcan_en_gpio,
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flexcan_en_active_high);
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gpio_set_value_cansleep(flexcan_stby_gpio,
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flexcan_stby_active_high);
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} else {
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/*
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* avoid to disable CAN xcvr if any of the CAN interfaces
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* are down. XCRV will be disabled only if both CAN2
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* interfaces are DOWN.
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*/
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gpio_set_value_cansleep(flexcan_en_gpio,
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!flexcan_en_active_high);
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gpio_set_value_cansleep(flexcan_stby_gpio,
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!flexcan_stby_active_high);
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}
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}
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static void imx6sx_arm2_flexcan0_switch(int enable)
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{
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flexcan0_en = enable;
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mx6sx_flexcan_switch();
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}
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static void imx6sx_arm2_flexcan1_switch(int enable)
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{
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flexcan1_en = enable;
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mx6sx_flexcan_switch();
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}
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static int __init imx6sx_arm2_flexcan_fixup(void)
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{
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struct device_node *np;
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enum of_gpio_flags en_flags, stby_flags;
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bool canfd_en = false;
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int wakeup_gpio;
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np = of_find_node_by_path("/soc/aips-bus@02000000/can@02090000");
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if (!np)
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return -ENODEV;
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/* Wakeup transceiver first in case it's in sleep mode by default */
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wakeup_gpio = of_get_named_gpio(np, "trx-wakeup-gpio", 0);
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if (gpio_is_valid(wakeup_gpio) &&
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!gpio_request_one(wakeup_gpio, GPIOF_OUT_INIT_HIGH, "flexcan-trx-wakeup")) {
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gpio_set_value_cansleep(wakeup_gpio, 0);
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gpio_set_value_cansleep(wakeup_gpio, 1);
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}
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flexcan_en_gpio = of_get_named_gpio_flags(np, "trx-en-gpio", 0, &en_flags);
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flexcan_stby_gpio = of_get_named_gpio_flags(np, "trx-stby-gpio", 0, &stby_flags);
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if (gpio_is_valid(flexcan_en_gpio) && gpio_is_valid(flexcan_stby_gpio) &&
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!gpio_request_one(flexcan_en_gpio, GPIOF_DIR_OUT, "flexcan-trx-en") &&
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!gpio_request_one(flexcan_stby_gpio, GPIOF_DIR_OUT, "flexcan-trx-stby")) {
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/* flexcan 0 & 1 are using the same GPIOs for transceiver */
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flexcan_pdata[0].transceiver_switch = imx6sx_arm2_flexcan0_switch;
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flexcan_pdata[1].transceiver_switch = imx6sx_arm2_flexcan1_switch;
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if (!(en_flags & OF_GPIO_ACTIVE_LOW))
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flexcan_en_active_high = 1;
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if (!(stby_flags & OF_GPIO_ACTIVE_LOW))
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flexcan_stby_active_high = 1;
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}
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/*
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* Switch on the transceiver by default for board with canfd enabled
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* since canfd driver does not handle it.
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* Two CAN instances share the same switch.
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*/
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for_each_node_by_name(np, "canfd") {
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if (of_device_is_available(np)) {
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canfd_en = true;
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break;
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}
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}
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if (of_machine_is_compatible("fsl,imx6sx-sdb") && canfd_en)
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imx6sx_arm2_flexcan0_switch(1);
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return 0;
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}
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static int ar8031_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Set RGMII IO voltage to 1.8V */
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phy_write(dev, 0x1d, 0x1f);
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phy_write(dev, 0x1e, 0x8);
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/* disable phy AR8031 SmartEEE function. */
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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val &= ~(0x1 << 8);
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phy_write(dev, 0xe, val);
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/* introduce tx clock delay */
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phy_write(dev, 0x1d, 0x5);
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val = phy_read(dev, 0x1e);
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val |= 0x0100;
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phy_write(dev, 0x1e, val);
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return 0;
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}
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#define PHY_ID_AR8031 0x004dd074
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static void __init imx6sx_enet_phy_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB))
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phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
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ar8031_phy_fixup);
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}
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static void __init imx6sx_enet_clk_sel(void)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
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} else {
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pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
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}
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}
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static inline void imx6sx_enet_init(void)
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{
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imx6_enet_mac_init("fsl,imx6sx-fec");
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imx6sx_enet_phy_init();
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imx6sx_enet_clk_sel();
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imx6sx_enet_plt_init();
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}
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/* Add auxdata to pass platform data */
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static const struct of_dev_auxdata imx6sx_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02090000, NULL, &flexcan_pdata[0]),
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OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02094000, NULL, &flexcan_pdata[1]),
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OF_DEV_AUXDATA("fsl,imx6sx-fec", 0x02188000, NULL, &fec_pdata[0]),
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OF_DEV_AUXDATA("fsl,imx6sx-fec", 0x021b4000, NULL, &fec_pdata[1]),
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{ /* sentinel */ }
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};
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static void __init imx6sx_init_machine(void)
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{
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struct device *parent;
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mxc_arch_reset_init_dt();
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parent = imx_soc_device_init();
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if (parent == NULL)
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pr_warn("failed to initialize soc device\n");
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of_platform_populate(NULL, of_default_bus_match_table,
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imx6sx_auxdata_lookup, parent);
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imx6sx_enet_init();
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imx_anatop_init();
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imx6sx_pm_init();
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}
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static void __init imx6sx_init_irq(void)
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{
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imx_init_revision_from_anatop();
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imx_init_l2cache();
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imx_src_init();
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imx_gpc_init();
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irqchip_init();
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}
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static const char *imx6sx_dt_compat[] __initdata = {
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"fsl,imx6sx",
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NULL,
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};
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static void __init imx6sx_opp_init(struct device *cpu_dev)
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{
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struct device_node *np;
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np = of_find_node_by_path("/cpus/cpu@0");
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if (!np) {
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pr_warn("failed to find cpu0 node\n");
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return;
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}
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cpu_dev->of_node = np;
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if (of_init_opp_table(cpu_dev))
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pr_warn("failed to init OPP table\n");
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of_node_put(np);
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}
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static struct platform_device imx6sx_cpufreq_pdev = {
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.name = "imx6q-cpufreq",
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};
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static void __init imx6sx_init_late(void)
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{
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
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imx6sx_opp_init(&imx6sx_cpufreq_pdev.dev);
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platform_device_register(&imx6sx_cpufreq_pdev);
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}
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if (of_machine_is_compatible("fsl,imx6sx-sdb") ||
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of_machine_is_compatible("fsl,imx6sx-sabreauto"))
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imx6sx_arm2_flexcan_fixup();
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imx6sx_cpuidle_init();
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}
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static void __init imx6sx_map_io(void)
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{
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debug_ll_io_init();
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imx6_pm_map_io();
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#ifdef CONFIG_CPU_FREQ
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imx_busfreq_map_io();
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#endif
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}
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DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
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.map_io = imx6sx_map_io,
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.init_irq = imx6sx_init_irq,
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.init_machine = imx6sx_init_machine,
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.init_late = imx6sx_init_late,
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.dt_compat = imx6sx_dt_compat,
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.restart = mxc_restart,
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MACHINE_END
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