685 lines
14 KiB
Plaintext
685 lines
14 KiB
Plaintext
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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mxcfb0 = &mxcfb1;
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mxcfb1 = &mxcfb2;
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mxcfb2 = &mxcfb3;
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mxcfb3 = &mxcfb4;
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};
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leds {
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compatible = "gpio-leds";
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cpu-user-led {
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gpios = <&gpio1 19 0>;
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linux,default-trigger = "heartbeat";
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retain-state-suspended;
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};
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sd-activity-led {
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gpios = <&gpio1 6 0>;
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linux,default-trigger = "mmc1"; /*SD activity LED*/
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};
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user-led-1 {
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gpios = <&gpio2 0 1>;
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};
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user-led-2 {
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gpios = <&gpio2 1 1>;
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};
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user-led-3 {
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gpios = <&gpio2 2 1>;
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};
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user-led-4 {
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gpios = <&gpio2 3 1>;
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};
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user-led-5 {
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gpios = <&gpio2 4 1>;
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};
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user-led-6 {
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gpios = <&gpio2 5 1>;
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};
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user-led-7 {
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gpios = <&gpio2 6 1>;
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};
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user-led-8 {
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gpios = <&gpio2 7 1>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio6 7 1>;
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gpio-key,wakeup;
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linux,code = <KEY_POWER>;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio6 9 1>;
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gpio-key,wakeup;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio6 8 1>;
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gpio-key,wakeup;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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sound-hdmi {
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compatible = "fsl,imx6q-audio-hdmi",
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"fsl,imx-audio-hdmi";
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model = "imx-audio-hdmi";
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hdmi-controller = <&hdmi_audio>;
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};
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mxcfb1: fb@0 {
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compatible = "fsl,mxc_sdc_fb";
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disp_dev = "hdmi";
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interface_pix_fmt = "RGB24";
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mode_str ="1920x1080M@60";
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default_bpp = <24>;
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int_clk = <0>;
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late_init = <0>;
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status = "disabled";
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};
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mxcfb2: fb@1 {
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compatible = "fsl,mxc_sdc_fb";
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disp_dev = "ldb";
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interface_pix_fmt = "RGB666";
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default_bpp = <16>;
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int_clk = <0>;
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late_init = <0>;
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status = "disabled";
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};
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mxcfb3: fb@2 {
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compatible = "fsl,mxc_sdc_fb";
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disp_dev = "lcd";
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interface_pix_fmt = "RGB565";
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mode_str ="CLAA-WVGA";
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default_bpp = <16>;
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int_clk = <0>;
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late_init = <0>;
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status = "disabled";
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};
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mxcfb4: fb@3 {
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compatible = "fsl,mxc_sdc_fb";
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disp_dev = "ldb";
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interface_pix_fmt = "RGB666";
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default_bpp = <16>;
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int_clk = <0>;
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late_init = <0>;
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status = "disabled";
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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status = "okay";
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};
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v4l2_cap_0 {
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compatible = "fsl,imx6q-v4l2-capture";
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ipu_id = <0>;
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csi_id = <0>;
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mclk_source = <0>;
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status = "okay";
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};
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v4l2_cap_1 {
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compatible = "fsl,imx6q-v4l2-capture";
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ipu_id = <0>;
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csi_id = <1>;
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mclk_source = <0>;
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status = "okay";
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};
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v4l2_out {
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compatible = "fsl,mxc_v4l2_output";
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status = "okay";
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};
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};
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&ldb {
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status = "okay";
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lvds-channel@0 {
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fsl,data-mapping = "spwg";
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fsl,data-width = <18>;
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status = "okay";
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display-timings {
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native-mode = <&timing0>;
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timing0: hsd100pxn1 {
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clock-frequency = <65000000>;
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hactive = <1024>;
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vactive = <768>;
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hback-porch = <220>;
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hfront-porch = <40>;
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vback-porch = <21>;
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vfront-porch = <7>;
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hsync-len = <60>;
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vsync-len = <10>;
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};
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&cpu0 {
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arm-supply = <&sw1a_reg>;
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soc-supply = <&sw1c_reg>;
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};
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&clks {
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fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
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fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
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};
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&ecspi1 {
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio2 30 0>, <&gpio5 9 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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};
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&ecspi3 {
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio4 24 0>, <&gpio4 26 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio1 25 0>;
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fsl,magic-packet;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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hdmi: edid@50 {
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compatible = "fsl,imx6-hdmi-i2c";
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reg = <0x50>;
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};
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pmic: pfuze100@08 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&dcic1 {
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dcic_id = <0>;
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dcic_mux = "dcic-hdmi";
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status = "okay";
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};
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&dcic2 {
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dcic_id = <1>;
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dcic_mux = "dcic-lvds1";
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status = "okay";
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};
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/* THIS MAY BE USEFUL IN FUTURE.
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** Have a look at ldo-bypass, how this could save some power
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** for now, leave it commented out */
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/*
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&gpc {
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fsl,ldo-bypass = <1>;
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fsl,wdog-reset = <1>;
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};
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*/
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&hdmi_audio {
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status = "okay";
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};
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&hdmi_cec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi_cec>;
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status = "okay";
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};
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&hdmi_core {
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ipu_id = <0>;
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disp_id = <0>;
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status = "okay";
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};
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&hdmi_video {
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fsl,phy_reg_vlev = <0x0294>;
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fsl,phy_reg_cksymtx = <0x800d>;
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status = "okay";
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};
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&mipi_csi {
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ipu_id = <0>;
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csi_id = <1>;
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v_channel = <0>;
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lanes = <2>;
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mipi_dphy_clk = <0x28>;
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status = "okay";
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};
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&pcie {
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reset-gpio = <&gpio4 15 0>;
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status = "disabled";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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srp-disable;
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hnp-disable;
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adp-disable;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio1 4 0>;
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wp-gpios = <&gpio1 2 0>;
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no-1-8-v;
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keep-power-in-suspend;
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enable-sdio-wakeup;
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status = "okay";
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};
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&wdog1 {
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status = "okay";
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};
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&wdog2 {
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status = "disabled";
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_openrex_flexcan1>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6q-openrex {
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pinctrl_openrex_flexcan1: openrex-flexcan1 {
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fsl,pins = <
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MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
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MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
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>;
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};
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};
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imx6qdl-sabresd {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x80000000 /* Board variant 0 */
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MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x80000000 /* Board variant 1 */
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MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x80000000 /* Board variant 2 */
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MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 /* Board ID0 */
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MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000 /* Board ID1 */
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MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x80000000 /* Board ID2 */
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MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x17059 /* SD CARD LED */
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MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00000831 /* LED1 Open Drain Output */
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MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x00000831 /* LED2 Open Drain Output */
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x00000831 /* LED3 Open Drain Output */
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MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x00000831 /* LED4 Open Drain Output */
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MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x00000831 /* LED5 Open Drain Output */
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MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x00000831 /* LED6 Open Drain Output */
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MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x00000831 /* LED7 Open Drain Output */
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MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x00000831 /* LED8 Open Drain Output */
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/*
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Automatically export GPIO pins (to create /sys/class/gpio/gpioXX) and assign them to gpio group, do following:
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create:
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"nano /etc/udev/rules.d/10-local.rules"
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add:
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#set MCU_RSTINn
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ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'echo 16 > /sys/class/gpio/export'"
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ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chown -R root:gpio /sys/class/gpio/gpio16/'"
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ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chmod -R 774 /sys/class/gpio/gpio16/'"
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#set MCU_ISPn
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ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'echo 18 > /sys/class/gpio/export'"
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ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chown -R root:gpio /sys/class/gpio/gpio18/'"
|
|
ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chmod -R 774 /sys/class/gpio/gpio18/'"
|
|
|
|
*/
|
|
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x00000831 /* MCU_RSTINn Open Drain Output */
|
|
MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x00000831 /* MCU_ISPn Open Drain Output */
|
|
>;
|
|
};
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* CS0 */
|
|
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x80000000 /* CS1 */
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi3: ecspi3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
|
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
|
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
|
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* CS0 */
|
|
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x80000000 /* CS2 */
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet: enetgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PHY Int */
|
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* PHY Int */
|
|
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x00000831 /* PHY Reset */
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio_keys: gpio_keysgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
|
|
MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x80000000
|
|
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
|
|
>;
|
|
};
|
|
|
|
pinctrl_hdmi_cec: hdmicecgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* CD */
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* WP */
|
|
>;
|
|
};
|
|
|
|
};
|
|
};
|
|
|