/* * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ #include / { aliases { mxcfb0 = &mxcfb1; mxcfb1 = &mxcfb2; mxcfb2 = &mxcfb3; mxcfb3 = &mxcfb4; }; leds { compatible = "gpio-leds"; charger-led { gpios = <&gpio2 7 0>; linux,default-trigger = "max8903-charger-charging"; retain-state-suspended; }; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; power { label = "Power Button"; gpios = <&gpio6 7 1>; gpio-key,wakeup; linux,code = ; }; volume-up { label = "Volume Up"; gpios = <&gpio6 9 1>; gpio-key,wakeup; linux,code = ; }; volume-down { label = "Volume Down"; gpios = <&gpio6 8 1>; gpio-key,wakeup; linux,code = ; }; }; sound-hdmi { compatible = "fsl,imx6q-audio-hdmi", "fsl,imx-audio-hdmi"; model = "imx-audio-hdmi"; hdmi-controller = <&hdmi_audio>; }; mxcfb1: fb@0 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "hdmi"; interface_pix_fmt = "RGB24"; mode_str ="1920x1080M@60"; default_bpp = <24>; int_clk = <0>; late_init = <0>; status = "disabled"; }; mxcfb2: fb@1 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "ldb"; interface_pix_fmt = "RGB666"; default_bpp = <16>; int_clk = <0>; late_init = <0>; status = "disabled"; }; mxcfb3: fb@2 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "lcd"; interface_pix_fmt = "RGB565"; mode_str ="CLAA-WVGA"; default_bpp = <16>; int_clk = <0>; late_init = <0>; status = "disabled"; }; mxcfb4: fb@3 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "ldb"; interface_pix_fmt = "RGB666"; default_bpp = <16>; int_clk = <0>; late_init = <0>; status = "disabled"; }; backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; status = "okay"; }; v4l2_cap_0 { compatible = "fsl,imx6q-v4l2-capture"; ipu_id = <0>; csi_id = <0>; mclk_source = <0>; status = "okay"; }; v4l2_cap_1 { compatible = "fsl,imx6q-v4l2-capture"; ipu_id = <0>; csi_id = <1>; mclk_source = <0>; status = "okay"; }; v4l2_out { compatible = "fsl,mxc_v4l2_output"; status = "okay"; }; }; &ldb { status = "okay"; lvds-channel@0 { fsl,data-mapping = "spwg"; fsl,data-width = <18>; status = "okay"; display-timings { native-mode = <&timing0>; timing0: hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; hback-porch = <220>; hfront-porch = <40>; vback-porch = <21>; vfront-porch = <7>; hsync-len = <60>; vsync-len = <10>; }; }; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; &cpu0 { arm-supply = <&sw1a_reg>; soc-supply = <&sw1c_reg>; }; &clks { fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; fsl,ldb-di1-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; }; &ecspi1 { fsl,spi-num-chipselects = <2>; cs-gpios = <&gpio2 30 0>, <&gpio5 9 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; status = "okay"; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; phy-reset-gpios = <&gpio1 25 0>; fsl,magic-packet; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; hdmi: edid@50 { compatible = "fsl,imx6-hdmi-i2c"; reg = <0x50>; }; pmic: pfuze100@08 { compatible = "fsl,pfuze100"; reg = <0x08>; regulators { sw1a_reg: sw1ab { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw1c_reg: sw1c { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw2_reg: sw2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw3a_reg: sw3a { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-boot-on; regulator-always-on; }; sw3b_reg: sw3b { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-boot-on; regulator-always-on; }; sw4_reg: sw4 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; }; swbst_reg: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>; }; snvs_reg: vsnvs { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3000000>; regulator-boot-on; regulator-always-on; }; vref_reg: vrefddr { regulator-boot-on; regulator-always-on; }; vgen1_reg: vgen1 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; vgen2_reg: vgen2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; vgen3_reg: vgen3 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; vgen4_reg: vgen4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen5_reg: vgen5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen6_reg: vgen6 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; }; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; }; &dcic1 { dcic_id = <0>; dcic_mux = "dcic-hdmi"; status = "okay"; }; &dcic2 { dcic_id = <1>; dcic_mux = "dcic-lvds1"; status = "okay"; }; /* THIS MAY BE USEFUL IN FUTURE. ** Have a look at ldo-bypass, how this could save some power ** for now, leave it commented out */ /* &gpc { fsl,ldo-bypass = <1>; fsl,wdog-reset = <1>; }; */ &hdmi_audio { status = "okay"; }; &hdmi_cec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hdmi_cec>; status = "okay"; }; &hdmi_core { ipu_id = <0>; disp_id = <0>; status = "okay"; }; &hdmi_video { fsl,phy_reg_vlev = <0x0294>; fsl,phy_reg_cksymtx = <0x800d>; status = "okay"; }; &mipi_csi { ipu_id = <0>; csi_id = <1>; v_channel = <0>; lanes = <2>; mipi_dphy_clk = <0x28>; status = "okay"; }; &pcie { reset-gpio = <&gpio4 15 0>; status = "disabled"; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &ssi2 { fsl,mode = "i2s-slave"; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &usbh1 { status = "okay"; }; &usbotg { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; srp-disable; hnp-disable; adp-disable; status = "okay"; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; bus-width = <4>; cd-gpios = <&gpio1 4 0>; wp-gpios = <&gpio1 2 0>; no-1-8-v; keep-power-in-suspend; enable-sdio-wakeup; status = "okay"; }; &wdog1 { status = "okay"; }; &wdog2 { status = "disabled"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx6qdl-sabresd { pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x80000000 /* Board variant 0 */ MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x80000000 /* Board variant 1 */ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x80000000 /* Board variant 2 */ MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 /* Board ID0 */ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000 /* Board ID1 */ MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x80000000 /* Board ID2 */ >; }; pinctrl_audmux: audmuxgrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* CS0 */ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x80000000 /* CS1 */ >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PHY Int */ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* PHY Int */ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x00000831 /* PHY Reset */ >; }; pinctrl_gpio_keys: gpio_keysgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x80000000 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 >; }; pinctrl_hdmi_cec: hdmicecgrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* CD */ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* WP */ >; }; }; };