From cf715db5aa71d0ae79873dc2b5f42bb6a34e0e1f Mon Sep 17 00:00:00 2001
From: yourname <your_email@example.com>
Date: Tue, 5 Apr 2016 07:57:47 -0700
Subject: [PATCH] DTS updated: LEDs added, SD card LED Activity set, I2C3
 corrected

---
 arch/arm/boot/dts/imx6qdl-openrex.dtsi | 72 +++++++++++++++++++++++---
 1 file changed, 64 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qdl-openrex.dtsi b/arch/arm/boot/dts/imx6qdl-openrex.dtsi
index 9fe8db37..c1da28dc 100644
--- a/arch/arm/boot/dts/imx6qdl-openrex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-openrex.dtsi
@@ -23,17 +23,41 @@
 	leds {
 		compatible = "gpio-leds";
 
-		charger-led {
-			gpios = <&gpio2 7 0>;
-			linux,default-trigger = "max8903-charger-charging";
-			retain-state-suspended;
-		};
-
 		cpu-user-led {
 			gpios = <&gpio1 19 0>;
 			linux,default-trigger = "heartbeat";
 			retain-state-suspended;
 		};
+
+		sd-activity-led {
+			gpios = <&gpio1 6 0>;
+			linux,default-trigger = "mmc1";  /*SD activity LED*/
+		};
+
+		user-led-1 {
+			gpios = <&gpio2 0 1>;
+		};
+		user-led-2 {
+			gpios = <&gpio2 1 1>;
+		};
+		user-led-3 {
+			gpios = <&gpio2 2 1>;
+		};
+		user-led-4 {
+			gpios = <&gpio2 3 1>;
+		};
+		user-led-5 {
+			gpios = <&gpio2 4 1>;
+		};
+		user-led-6 {
+			gpios = <&gpio2 5 1>;
+		};
+		user-led-7 {
+			gpios = <&gpio2 6 1>;
+		};
+		user-led-8 {
+			gpios = <&gpio2 7 1>;
+		};
 	};
 
 	regulators {
@@ -469,6 +493,38 @@
 				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 	0x80000000 /* Board ID0 */
 				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17	0x80000000 /* Board ID1 */
 				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x80000000 /* Board ID2 */
+
+				MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x17059	   /* SD CARD LED */
+
+				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x00000831 /* LED1 Open Drain Output */
+				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x00000831 /* LED2 Open Drain Output */
+				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x00000831 /* LED3 Open Drain Output */
+				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x00000831 /* LED4 Open Drain Output */
+				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x00000831 /* LED5 Open Drain Output */
+				MX6QDL_PAD_NANDF_D5__GPIO2_IO05		0x00000831 /* LED6 Open Drain Output */
+				MX6QDL_PAD_NANDF_D6__GPIO2_IO06		0x00000831 /* LED7 Open Drain Output */
+				MX6QDL_PAD_NANDF_D7__GPIO2_IO07		0x00000831 /* LED8 Open Drain Output */
+
+				/* 
+				Automatically export GPIO pins (to create /sys/class/gpio/gpioXX) and assign them to gpio group, do following:
+
+				create: 
+				"nano /etc/udev/rules.d/10-local.rules"
+
+				add:
+				#set MCU_RSTINn
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'echo 16 > /sys/class/gpio/export'"
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chown -R root:gpio /sys/class/gpio/gpio16/'"
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chmod -R 664 /sys/class/gpio/gpio16/'"
+
+				#set MCU_ISPn
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'echo 18 > /sys/class/gpio/export'"
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chown -R root:gpio /sys/class/gpio/gpio18/'"
+				ACTION=="add", SUBSYSTEM=="gpio", PROGRAM="/bin/sh -c 'chmod -R 664 /sys/class/gpio/gpio18/'"
+
+				*/
+				MX6QDL_PAD_SD1_DAT0__GPIO1_IO16		0x00000831 /* MCU_RSTINn Open Drain Output */
+				MX6QDL_PAD_SD1_CMD__GPIO1_IO18		0x00000831 /* MCU_ISPn Open Drain Output */
 			>;
 		};
 
@@ -537,15 +593,15 @@
 
 		pinctrl_i2c2: i2c2grp {
 			fsl,pins = <
-				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
 				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 		0x4001b8b1
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
 			 >;
 		};
 
 		pinctrl_i2c3: i2c3grp {
 			fsl,pins = <
 				MX6QDL_PAD_GPIO_16__I2C3_SDA		0x4001b8b1
-				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+				MX6QDL_PAD_GPIO_5__I2C3_SCL		0x4001b8b1
 			>;
 		};