Reboot fixed, DTS cleaned a little bit

This commit is contained in:
yourname 2016-03-11 05:59:13 -08:00
parent 8714bed060
commit cc643ef314
3 changed files with 161 additions and 190 deletions

View File

@ -46,11 +46,7 @@ Here are instructions how to compile the source code
Go to OpenRex board, interrupt uBoot booting process (press any key). Then write following commands:
run update_kernel
run update_fdt
Then press "RESET" button and wait until it boots up.
run update_kernel;run update_fdt;reset
Note: if you would like to test the kernel without saving it to SD card, go to uBoot and use following commands:

View File

@ -18,6 +18,10 @@
/ {
model = "FEDEVEL i.MX6 Quad OpenRex Board";
compatible = "fsl,imx6q-openrex", "fsl,imx6q";
memory {
reg = <0x10000000 0x80000000>; /* reg = 0x10000000 (base address) 0x80000000 (size = 2147483648 bits => 2GB) */
};
};
&mxcfb1 {
@ -25,17 +29,21 @@
};
&mxcfb2 {
status = "okay";
status = "disabled";
};
&mxcfb3 {
status = "okay";
status = "disabled";
};
&mxcfb4 {
status = "okay";
status = "disabled";
};
&sata {
status = "okay";
};
&pcie {
status = "okay";
};

View File

@ -30,10 +30,6 @@
};
};
memory: memory {
reg = <0x10000000 0x40000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@ -122,9 +118,10 @@
mxcfb1: fb@0 {
compatible = "fsl,mxc_sdc_fb";
disp_dev = "ldb";
interface_pix_fmt = "RGB666";
default_bpp = <16>;
disp_dev = "hdmi";
interface_pix_fmt = "RGB24";
mode_str ="1920x1080M@60";
default_bpp = <24>;
int_clk = <0>;
late_init = <0>;
status = "disabled";
@ -132,10 +129,9 @@
mxcfb2: fb@1 {
compatible = "fsl,mxc_sdc_fb";
disp_dev = "hdmi";
interface_pix_fmt = "RGB24";
mode_str ="1920x1080M@60";
default_bpp = <24>;
disp_dev = "ldb";
interface_pix_fmt = "RGB666";
default_bpp = <16>;
int_clk = <0>;
late_init = <0>;
status = "disabled";
@ -191,11 +187,30 @@
status = "okay";
};
mipi_dsi_reset: mipi-dsi-reset {
compatible = "gpio-reset";
reset-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>;
reset-delay-us = <50>;
#reset-cells = <0>;
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
@ -216,8 +231,8 @@
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio2 30 0>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio2 30 0>, <&gpio5 9 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
@ -363,6 +378,120 @@
};
&dcic1 {
dcic_id = <0>;
dcic_mux = "dcic-hdmi";
status = "okay";
};
&dcic2 {
dcic_id = <1>;
dcic_mux = "dcic-lvds1";
status = "okay";
};
/* THIS MAY BE USEFUL IN FUTURE.
** Have a look at ldo-bypass, how this could save some power
** for now, leave it commented out */
/*
&gpc {
fsl,ldo-bypass = <1>;
fsl,wdog-reset = <1>;
};
*/
&hdmi_audio {
status = "okay";
};
&hdmi_cec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_cec>;
status = "okay";
};
&hdmi_core {
ipu_id = <0>;
disp_id = <0>;
status = "okay";
};
&hdmi_video {
fsl,phy_reg_vlev = <0x0294>;
fsl,phy_reg_cksymtx = <0x800d>;
status = "okay";
};
&mipi_csi {
ipu_id = <0>;
csi_id = <1>;
v_channel = <0>;
lanes = <2>;
mipi_dphy_clk = <0x28>;
status = "okay";
};
&pcie {
power-on-gpio = <&gpio3 19 0>;
reset-gpio = <&gpio7 12 0>;
status = "disabled";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;
cd-gpios = <&gpio1 4 0>;
wp-gpios = <&gpio1 2 0>;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakeup;
status = "okay";
};
&wdog1 {
status = "okay";
};
&wdog2 {
status = "disabled";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
@ -394,6 +523,8 @@
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000 /* CS0 */
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x80000000 /* CS1 */
>;
};
@ -490,167 +621,3 @@
};
};
&dcic1 {
dcic_id = <0>;
dcic_mux = "dcic-hdmi";
status = "okay";
};
&dcic2 {
dcic_id = <1>;
dcic_mux = "dcic-lvds1";
status = "okay";
};
&gpc {
/* use ldo-bypass, u-boot will check it and configure */
fsl,ldo-bypass = <1>;
fsl,wdog-reset = <2>;
};
&hdmi_audio {
status = "okay";
};
&hdmi_cec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_cec>;
status = "okay";
};
&hdmi_core {
ipu_id = <0>;
disp_id = <0>;
status = "okay";
};
&hdmi_video {
fsl,phy_reg_vlev = <0x0294>;
fsl,phy_reg_cksymtx = <0x800d>;
status = "okay";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
lvds-channel@1 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
primary;
status = "okay";
display-timings {
native-mode = <&timing1>;
timing1: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&mipi_csi {
status = "okay";
ipu_id = <0>;
csi_id = <1>;
v_channel = <0>;
lanes = <2>;
};
&mipi_dsi {
dev_id = <0>;
disp_id = <1>;
lcd_panel = "TRULY-WVGA";
disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;
resets = <&mipi_dsi_reset>;
status = "okay";
};
&pcie {
power-on-gpio = <&gpio3 19 0>;
reset-gpio = <&gpio7 12 0>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;
cd-gpios = <&gpio1 4 0>;
wp-gpios = <&gpio1 2 0>;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakeup;
status = "okay";
};
&wdog1 {
status = "disabled";
};
&wdog2 {
status = "okay";
};