Setup cspi3 and spidev in DTS
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c7f3526006
commit
11be3e6e5b
@ -47,3 +47,12 @@
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&pcie {
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status = "okay";
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};
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&ecspi3 {
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spidev30: spi@3 {
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compatible = "spidev";
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reg = <0>;
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spi-max-frequency = <57600000>;
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};
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};
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@ -222,6 +222,14 @@
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status = "okay";
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};
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&ecspi3 {
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio4 24 0>, <&gpio4 26 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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@ -547,6 +555,16 @@
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
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MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* CS0 */
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MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x80000000 /* CS2 */
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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